Home Explore Help
Register Sign In
phyus
/
linux-vybrid_public
8
0
Fork 0
Files Issues 0 Pull Requests 0 Wiki
Browse Source

clk: tegra: fix pllre initilization

The PLLRE flags weren't set correctly. Fixed in this patch.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Peter De Schrijver 12 years ago
parent
fd428ad87b
commit
35d287a9f7
1 changed files with 1 additions and 2 deletions
Split View Show Diff Stats
  1. 1 2
      drivers/clk/tegra/clk-pll.c

+ 1 - 2
drivers/clk/tegra/clk-pll.c
View File 

@@ -1409,7 +1409,7 @@ struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name,
 
 	struct tegra_clk_pll *pll;
 
 	struct clk *clk;
 
 
-	pll_flags |= TEGRA_PLL_HAS_LOCK_ENABLE;
 
+	pll_flags |= TEGRA_PLL_HAS_LOCK_ENABLE | TEGRA_PLL_LOCK_MISC;
 
 	pll = _tegra_init_pll(clk_base, pmc, fixed_rate, pll_params, pll_flags,
 
 			      freq_table, lock);
 
 	if (IS_ERR(pll))
 
@@ -1436,7 +1436,6 @@ struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name,
 
 	val &= ~BIT(29);
 
 	pll_writel_misc(val, pll);
 
 
-	pll_flags |= TEGRA_PLL_LOCK_MISC;
 
 	clk = _tegra_clk_register_pll(pll, name, parent_name, flags,
 
 				      &tegra_clk_pllre_ops);
 
 	if (IS_ERR(clk))