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@@ -20,6 +20,7 @@
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#include <linux/leds.h>
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#include <linux/spi/spi.h>
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#include <linux/atmel-mci.h>
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+#include <linux/usb/atmel_usba_udc.h>
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#include <asm/io.h>
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#include <asm/setup.h>
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@@ -36,6 +37,75 @@ unsigned long at32_board_osc_rates[3] = {
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[2] = 12000000, /* 12 MHz on osc1 */
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};
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+/*
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+ * The ATNGW100 mkII is very similar to the ATNGW100. Both have the AT32AP7000
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+ * chip on board; the difference is that the ATNGW100 mkII has 128 MB 32-bit
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+ * SDRAM (the ATNGW100 has 32 MB 16-bit SDRAM) and 256 MB 16-bit NAND flash
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+ * (the ATNGW100 has none.)
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+ *
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+ * The RAM difference is handled by the boot loader, so the only difference we
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+ * end up handling here is the NAND flash, EBI pin reservation and if LCDC or
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+ * MACB1 should be enabled.
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+ */
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+#ifdef CONFIG_BOARD_ATNGW100_MKII
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+#include <linux/mtd/partitions.h>
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+#include <mach/smc.h>
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+
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+static struct smc_timing nand_timing __initdata = {
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+ .ncs_read_setup = 0,
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+ .nrd_setup = 10,
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+ .ncs_write_setup = 0,
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+ .nwe_setup = 10,
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+
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+ .ncs_read_pulse = 30,
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+ .nrd_pulse = 15,
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+ .ncs_write_pulse = 30,
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+ .nwe_pulse = 15,
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+
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+ .read_cycle = 30,
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+ .write_cycle = 30,
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+
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+ .ncs_read_recover = 0,
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+ .nrd_recover = 15,
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+ .ncs_write_recover = 0,
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+ /* WE# high -> RE# low min 60 ns */
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+ .nwe_recover = 50,
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+};
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+
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+static struct smc_config nand_config __initdata = {
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+ .bus_width = 2,
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+ .nrd_controlled = 1,
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+ .nwe_controlled = 1,
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+ .nwait_mode = 0,
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+ .byte_write = 0,
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+ .tdf_cycles = 2,
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+ .tdf_mode = 0,
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+};
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+
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+static struct mtd_partition nand_partitions[] = {
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+ {
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+ .name = "main",
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+ .offset = 0x00000000,
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+ .size = MTDPART_SIZ_FULL,
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+ },
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+};
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+
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+static struct mtd_partition *nand_part_info(int size, int *num_partitions)
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+{
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+ *num_partitions = ARRAY_SIZE(nand_partitions);
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+ return nand_partitions;
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+}
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+
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+static struct atmel_nand_data atngw100mkii_nand_data __initdata = {
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+ .cle = 21,
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+ .ale = 22,
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+ .rdy_pin = GPIO_PIN_PB(28),
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+ .enable_pin = GPIO_PIN_PE(23),
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+ .bus_width_16 = true,
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+ .partition_info = nand_part_info,
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+};
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+#endif
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+
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/* Initialized by bootloader-specific startup code. */
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struct tag *bootloader_tags __initdata;
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@@ -56,11 +126,24 @@ static struct spi_board_info spi0_board_info[] __initdata = {
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static struct mci_platform_data __initdata mci0_data = {
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.slot[0] = {
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.bus_width = 4,
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+#if defined(CONFIG_BOARD_ATNGW100_MKII)
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+ .detect_pin = GPIO_PIN_PC(25),
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+ .wp_pin = GPIO_PIN_PE(22),
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+#else
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.detect_pin = GPIO_PIN_PC(25),
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.wp_pin = GPIO_PIN_PE(0),
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+#endif
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},
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};
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+static struct usba_platform_data atngw100_usba_data __initdata = {
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+#if defined(CONFIG_BOARD_ATNGW100_MKII)
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+ .vbus_pin = GPIO_PIN_PE(26),
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+#else
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+ .vbus_pin = -ENODEV,
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+#endif
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+};
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+
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/*
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* The next two functions should go away as the boot loader is
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* supposed to initialize the macb address registers with a valid
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@@ -168,18 +251,27 @@ static int __init atngw100_init(void)
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unsigned i;
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/*
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- * ATNGW100 uses 16-bit SDRAM interface, so we don't need to
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- * reserve any pins for it.
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+ * ATNGW100 mkII uses 32-bit SDRAM interface. Reserve the
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+ * SDRAM-specific pins so that nobody messes with them.
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*/
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+#ifdef CONFIG_BOARD_ATNGW100_MKII
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+ at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
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+
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+ smc_set_timing(&nand_config, &nand_timing);
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+ smc_set_configuration(3, &nand_config);
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+ at32_add_device_nand(0, &atngw100mkii_nand_data);
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+#endif
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at32_add_device_usart(0);
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set_hw_addr(at32_add_device_eth(0, ð_data[0]));
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+#ifndef CONFIG_BOARD_ATNGW100_MKII_LCD
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set_hw_addr(at32_add_device_eth(1, ð_data[1]));
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+#endif
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at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
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at32_add_device_mci(0, &mci0_data);
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- at32_add_device_usba(0, NULL);
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+ at32_add_device_usba(0, &atngw100_usba_data);
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for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
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at32_select_gpio(ngw_leds[i].gpio,
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@@ -189,10 +281,14 @@ static int __init atngw100_init(void)
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/* all these i2c/smbus pins should have external pullups for
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* open-drain sharing among all I2C devices. SDA and SCL do;
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- * PB28/EXTINT3 doesn't; it should be SMBALERT# (for PMBus),
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- * but it's not available off-board.
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+ * PB28/EXTINT3 (ATNGW100) and PE21 (ATNGW100 mkII) doesn't; it should
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+ * be SMBALERT# (for PMBus), but it's not available off-board.
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*/
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+#ifdef CONFIG_BOARD_ATNGW100_MKII
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+ at32_select_periph(GPIO_PIOE_BASE, 1 << 21, 0, AT32_GPIOF_PULLUP);
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+#else
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at32_select_periph(GPIO_PIOB_BASE, 1 << 28, 0, AT32_GPIOF_PULLUP);
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+#endif
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at32_select_gpio(i2c_gpio_data.sda_pin,
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AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
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at32_select_gpio(i2c_gpio_data.scl_pin,
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@@ -206,14 +302,22 @@ postcore_initcall(atngw100_init);
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static int __init atngw100_arch_init(void)
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{
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- /* PB30 is the otherwise unused jumper on the mainboard, with an
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- * external pullup; the jumper grounds it. Use it however you
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- * like, including letting U-Boot or Linux tweak boot sequences.
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+ /* PB30 (ATNGW100) and PE30 (ATNGW100 mkII) is the otherwise unused
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+ * jumper on the mainboard, with an external pullup; the jumper grounds
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+ * it. Use it however you like, including letting U-Boot or Linux tweak
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+ * boot sequences.
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*/
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+#ifdef CONFIG_BOARD_ATNGW100_MKII
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+ at32_select_gpio(GPIO_PIN_PE(30), 0);
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+ gpio_request(GPIO_PIN_PE(30), "j15");
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+ gpio_direction_input(GPIO_PIN_PE(30));
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+ gpio_export(GPIO_PIN_PE(30), false);
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+#else
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at32_select_gpio(GPIO_PIN_PB(30), 0);
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gpio_request(GPIO_PIN_PB(30), "j15");
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gpio_direction_input(GPIO_PIN_PB(30));
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gpio_export(GPIO_PIN_PB(30), false);
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+#endif
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/* set_irq_type() after the arch_initcall for EIC has run, and
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* before the I2C subsystem could try using this IRQ.
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Hans-Christian Egtvedt