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@@ -466,7 +466,7 @@
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#define IH_RB_WPTR_ADDR_LO 0x3e14
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#define IH_CNTL 0x3e18
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# define ENABLE_INTR (1 << 0)
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-# define IH_MC_SWAP(x) ((x) << 2)
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+# define IH_MC_SWAP(x) ((x) << 1)
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# define IH_MC_SWAP_NONE 0
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# define IH_MC_SWAP_16BIT 1
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# define IH_MC_SWAP_32BIT 2
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@@ -547,7 +547,7 @@
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# define LB_D5_VBLANK_INTERRUPT (1 << 3)
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# define DC_HPD5_INTERRUPT (1 << 17)
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# define DC_HPD5_RX_INTERRUPT (1 << 18)
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-#define DISP_INTERRUPT_STATUS_CONTINUE5 0x6050
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+#define DISP_INTERRUPT_STATUS_CONTINUE5 0x6150
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# define LB_D6_VLINE_INTERRUPT (1 << 2)
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# define LB_D6_VBLANK_INTERRUPT (1 << 3)
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# define DC_HPD6_INTERRUPT (1 << 17)
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