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@@ -34,6 +34,12 @@
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#define PCI_DEVICE_ID_INTEL_Q33_IG 0x29D2
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#define PCI_DEVICE_ID_INTEL_IGD_HB 0x2A40
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#define PCI_DEVICE_ID_INTEL_IGD_IG 0x2A42
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+#define PCI_DEVICE_ID_INTEL_IGD_E_HB 0x2E00
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+#define PCI_DEVICE_ID_INTEL_IGD_E_IG 0x2E02
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+#define PCI_DEVICE_ID_INTEL_Q45_HB 0x2E10
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+#define PCI_DEVICE_ID_INTEL_Q45_IG 0x2E12
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+#define PCI_DEVICE_ID_INTEL_G45_HB 0x2E20
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+#define PCI_DEVICE_ID_INTEL_G45_IG 0x2E22
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/* cover 915 and 945 variants */
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#define IS_I915 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_E7221_HB || \
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@@ -55,6 +61,10 @@
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q35_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q33_HB)
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+#define IS_G4X (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGD_E_HB || \
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+ agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q45_HB || \
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+ agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G45_HB)
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+
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extern int agp_memory_reserved;
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@@ -80,8 +90,13 @@ extern int agp_memory_reserved;
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#define I915_PTEADDR 0x1C
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#define I915_GMCH_GMS_STOLEN_48M (0x6 << 4)
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#define I915_GMCH_GMS_STOLEN_64M (0x7 << 4)
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-#define G33_GMCH_GMS_STOLEN_128M (0x8 << 4)
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-#define G33_GMCH_GMS_STOLEN_256M (0x9 << 4)
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+#define G33_GMCH_GMS_STOLEN_128M (0x8 << 4)
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+#define G33_GMCH_GMS_STOLEN_256M (0x9 << 4)
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+#define INTEL_GMCH_GMS_STOLEN_96M (0xa << 4)
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+#define INTEL_GMCH_GMS_STOLEN_160M (0xb << 4)
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+#define INTEL_GMCH_GMS_STOLEN_224M (0xc << 4)
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+#define INTEL_GMCH_GMS_STOLEN_352M (0xd << 4)
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+
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#define I915_IFPADDR 0x60
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/* Intel 965G registers */
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@@ -325,7 +340,7 @@ static int intel_i810_insert_entries(struct agp_memory *mem, off_t pg_start,
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out:
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ret = 0;
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out_err:
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- mem->is_flushed = 1;
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+ mem->is_flushed = true;
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return ret;
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}
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@@ -418,9 +433,11 @@ static void intel_i810_free_by_type(struct agp_memory *curr)
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if (curr->page_count == 4)
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i8xx_destroy_pages(gart_to_virt(curr->memory[0]));
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else {
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- agp_bridge->driver->agp_destroy_page(gart_to_virt(curr->memory[0]),
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+ void *va = gart_to_virt(curr->memory[0]);
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+
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+ agp_bridge->driver->agp_destroy_page(va,
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AGP_PAGE_DESTROY_UNMAP);
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- agp_bridge->driver->agp_destroy_page(gart_to_virt(curr->memory[0]),
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+ agp_bridge->driver->agp_destroy_page(va,
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AGP_PAGE_DESTROY_FREE);
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}
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agp_free_page_array(curr);
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@@ -504,6 +521,10 @@ static void intel_i830_init_gtt_entries(void)
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size = 512;
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}
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size += 4;
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+ } else if (IS_G4X) {
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+ /* On 4 series hardware, GTT stolen is separate from graphics
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+ * stolen, ignore it in stolen gtt entries counting */
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+ size = 0;
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} else {
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/* On previous hardware, the GTT size was just what was
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* required to map the aperture.
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@@ -552,30 +573,54 @@ static void intel_i830_init_gtt_entries(void)
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break;
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case I915_GMCH_GMS_STOLEN_48M:
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/* Check it's really I915G */
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- if (IS_I915 || IS_I965 || IS_G33)
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+ if (IS_I915 || IS_I965 || IS_G33 || IS_G4X)
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gtt_entries = MB(48) - KB(size);
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else
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gtt_entries = 0;
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break;
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case I915_GMCH_GMS_STOLEN_64M:
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/* Check it's really I915G */
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- if (IS_I915 || IS_I965 || IS_G33)
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+ if (IS_I915 || IS_I965 || IS_G33 || IS_G4X)
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gtt_entries = MB(64) - KB(size);
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else
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gtt_entries = 0;
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break;
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case G33_GMCH_GMS_STOLEN_128M:
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- if (IS_G33)
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+ if (IS_G33 || IS_I965 || IS_G4X)
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gtt_entries = MB(128) - KB(size);
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else
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gtt_entries = 0;
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break;
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case G33_GMCH_GMS_STOLEN_256M:
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- if (IS_G33)
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+ if (IS_G33 || IS_I965 || IS_G4X)
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gtt_entries = MB(256) - KB(size);
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else
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gtt_entries = 0;
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break;
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+ case INTEL_GMCH_GMS_STOLEN_96M:
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+ if (IS_I965 || IS_G4X)
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+ gtt_entries = MB(96) - KB(size);
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+ else
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+ gtt_entries = 0;
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+ break;
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+ case INTEL_GMCH_GMS_STOLEN_160M:
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+ if (IS_I965 || IS_G4X)
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+ gtt_entries = MB(160) - KB(size);
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+ else
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+ gtt_entries = 0;
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+ break;
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+ case INTEL_GMCH_GMS_STOLEN_224M:
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+ if (IS_I965 || IS_G4X)
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+ gtt_entries = MB(224) - KB(size);
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+ else
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+ gtt_entries = 0;
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+ break;
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+ case INTEL_GMCH_GMS_STOLEN_352M:
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+ if (IS_I965 || IS_G4X)
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+ gtt_entries = MB(352) - KB(size);
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+ else
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+ gtt_entries = 0;
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+ break;
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default:
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gtt_entries = 0;
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break;
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@@ -793,7 +838,7 @@ static int intel_i830_insert_entries(struct agp_memory *mem, off_t pg_start,
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out:
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ret = 0;
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out_err:
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- mem->is_flushed = 1;
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+ mem->is_flushed = true;
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return ret;
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}
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@@ -1020,7 +1065,7 @@ static int intel_i915_insert_entries(struct agp_memory *mem, off_t pg_start,
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out:
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ret = 0;
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out_err:
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- mem->is_flushed = 1;
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+ mem->is_flushed = true;
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return ret;
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}
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@@ -1134,53 +1179,64 @@ static unsigned long intel_i965_mask_memory(struct agp_bridge_data *bridge,
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return addr | bridge->driver->masks[type].mask;
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}
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+static void intel_i965_get_gtt_range(int *gtt_offset, int *gtt_size)
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+{
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+ switch (agp_bridge->dev->device) {
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+ case PCI_DEVICE_ID_INTEL_IGD_HB:
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+ case PCI_DEVICE_ID_INTEL_IGD_E_HB:
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+ case PCI_DEVICE_ID_INTEL_Q45_HB:
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+ case PCI_DEVICE_ID_INTEL_G45_HB:
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+ *gtt_offset = *gtt_size = MB(2);
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+ break;
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+ default:
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+ *gtt_offset = *gtt_size = KB(512);
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+ }
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+}
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+
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/* The intel i965 automatically initializes the agp aperture during POST.
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* Use the memory already set aside for in the GTT.
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*/
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static int intel_i965_create_gatt_table(struct agp_bridge_data *bridge)
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{
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- int page_order;
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- struct aper_size_info_fixed *size;
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- int num_entries;
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- u32 temp;
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- int gtt_offset, gtt_size;
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+ int page_order;
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+ struct aper_size_info_fixed *size;
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+ int num_entries;
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+ u32 temp;
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+ int gtt_offset, gtt_size;
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- size = agp_bridge->current_size;
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- page_order = size->page_order;
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- num_entries = size->num_entries;
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- agp_bridge->gatt_table_real = NULL;
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+ size = agp_bridge->current_size;
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+ page_order = size->page_order;
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+ num_entries = size->num_entries;
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+ agp_bridge->gatt_table_real = NULL;
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- pci_read_config_dword(intel_private.pcidev, I915_MMADDR, &temp);
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+ pci_read_config_dword(intel_private.pcidev, I915_MMADDR, &temp);
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- temp &= 0xfff00000;
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+ temp &= 0xfff00000;
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- if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGD_HB)
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- gtt_offset = gtt_size = MB(2);
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- else
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- gtt_offset = gtt_size = KB(512);
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+ intel_i965_get_gtt_range(>t_offset, >t_size);
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- intel_private.gtt = ioremap((temp + gtt_offset) , gtt_size);
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+ intel_private.gtt = ioremap((temp + gtt_offset) , gtt_size);
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- if (!intel_private.gtt)
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- return -ENOMEM;
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+ if (!intel_private.gtt)
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+ return -ENOMEM;
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- intel_private.registers = ioremap(temp, 128 * 4096);
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- if (!intel_private.registers) {
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+ intel_private.registers = ioremap(temp, 128 * 4096);
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+ if (!intel_private.registers) {
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iounmap(intel_private.gtt);
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return -ENOMEM;
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}
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- temp = readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000;
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- global_cache_flush(); /* FIXME: ? */
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+ temp = readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000;
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+ global_cache_flush(); /* FIXME: ? */
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- /* we have to call this as early as possible after the MMIO base address is known */
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- intel_i830_init_gtt_entries();
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+ /* we have to call this as early as possible after the MMIO base address is known */
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+ intel_i830_init_gtt_entries();
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- agp_bridge->gatt_table = NULL;
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+ agp_bridge->gatt_table = NULL;
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- agp_bridge->gatt_bus_addr = temp;
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+ agp_bridge->gatt_bus_addr = temp;
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- return 0;
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+ return 0;
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}
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@@ -1656,7 +1712,7 @@ static const struct agp_bridge_driver intel_810_driver = {
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.aperture_sizes = intel_i810_sizes,
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.size_type = FIXED_APER_SIZE,
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.num_aperture_sizes = 2,
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- .needs_scratch_page = TRUE,
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+ .needs_scratch_page = true,
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.configure = intel_i810_configure,
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.fetch_size = intel_i810_fetch_size,
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.cleanup = intel_i810_cleanup,
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@@ -1697,7 +1753,7 @@ static const struct agp_bridge_driver intel_815_driver = {
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.free_by_type = agp_generic_free_by_type,
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.agp_alloc_page = agp_generic_alloc_page,
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.agp_destroy_page = agp_generic_destroy_page,
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- .agp_type_to_mask_type = agp_generic_type_to_mask_type,
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+ .agp_type_to_mask_type = agp_generic_type_to_mask_type,
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};
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static const struct agp_bridge_driver intel_830_driver = {
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@@ -1705,7 +1761,7 @@ static const struct agp_bridge_driver intel_830_driver = {
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.aperture_sizes = intel_i830_sizes,
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.size_type = FIXED_APER_SIZE,
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.num_aperture_sizes = 4,
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- .needs_scratch_page = TRUE,
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+ .needs_scratch_page = true,
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.configure = intel_i830_configure,
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.fetch_size = intel_i830_fetch_size,
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.cleanup = intel_i830_cleanup,
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@@ -1876,7 +1932,7 @@ static const struct agp_bridge_driver intel_915_driver = {
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.aperture_sizes = intel_i830_sizes,
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.size_type = FIXED_APER_SIZE,
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.num_aperture_sizes = 4,
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- .needs_scratch_page = TRUE,
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+ .needs_scratch_page = true,
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.configure = intel_i915_configure,
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.fetch_size = intel_i9xx_fetch_size,
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.cleanup = intel_i915_cleanup,
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@@ -1898,28 +1954,26 @@ static const struct agp_bridge_driver intel_915_driver = {
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};
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static const struct agp_bridge_driver intel_i965_driver = {
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- .owner = THIS_MODULE,
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- .aperture_sizes = intel_i830_sizes,
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- .size_type = FIXED_APER_SIZE,
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- .num_aperture_sizes = 4,
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- .needs_scratch_page = TRUE,
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- .configure = intel_i915_configure,
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- .fetch_size = intel_i9xx_fetch_size,
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- .cleanup = intel_i915_cleanup,
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- .tlb_flush = intel_i810_tlbflush,
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- .mask_memory = intel_i965_mask_memory,
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- .masks = intel_i810_masks,
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- .agp_enable = intel_i810_agp_enable,
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- .cache_flush = global_cache_flush,
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- .create_gatt_table = intel_i965_create_gatt_table,
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- .free_gatt_table = intel_i830_free_gatt_table,
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- .insert_memory = intel_i915_insert_entries,
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- .remove_memory = intel_i915_remove_entries,
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- .alloc_by_type = intel_i830_alloc_by_type,
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- .free_by_type = intel_i810_free_by_type,
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- .agp_alloc_page = agp_generic_alloc_page,
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- .agp_destroy_page = agp_generic_destroy_page,
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- .agp_type_to_mask_type = intel_i830_type_to_mask_type,
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+ .owner = THIS_MODULE,
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+ .aperture_sizes = intel_i830_sizes,
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+ .size_type = FIXED_APER_SIZE,
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+ .num_aperture_sizes = 4,
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+ .needs_scratch_page = true,
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+ .cleanup = intel_i915_cleanup,
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+ .tlb_flush = intel_i810_tlbflush,
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+ .mask_memory = intel_i965_mask_memory,
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+ .masks = intel_i810_masks,
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+ .agp_enable = intel_i810_agp_enable,
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+ .cache_flush = global_cache_flush,
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+ .create_gatt_table = intel_i965_create_gatt_table,
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+ .free_gatt_table = intel_i830_free_gatt_table,
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+ .insert_memory = intel_i915_insert_entries,
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+ .remove_memory = intel_i915_remove_entries,
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+ .alloc_by_type = intel_i830_alloc_by_type,
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+ .free_by_type = intel_i810_free_by_type,
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+ .agp_alloc_page = agp_generic_alloc_page,
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+ .agp_destroy_page = agp_generic_destroy_page,
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+ .agp_type_to_mask_type = intel_i830_type_to_mask_type,
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.chipset_flush = intel_i915_chipset_flush,
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};
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@@ -1948,28 +2002,28 @@ static const struct agp_bridge_driver intel_7505_driver = {
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};
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static const struct agp_bridge_driver intel_g33_driver = {
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- .owner = THIS_MODULE,
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- .aperture_sizes = intel_i830_sizes,
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- .size_type = FIXED_APER_SIZE,
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- .num_aperture_sizes = 4,
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- .needs_scratch_page = TRUE,
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- .configure = intel_i915_configure,
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- .fetch_size = intel_i9xx_fetch_size,
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- .cleanup = intel_i915_cleanup,
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- .tlb_flush = intel_i810_tlbflush,
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- .mask_memory = intel_i965_mask_memory,
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- .masks = intel_i810_masks,
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- .agp_enable = intel_i810_agp_enable,
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- .cache_flush = global_cache_flush,
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- .create_gatt_table = intel_i915_create_gatt_table,
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- .free_gatt_table = intel_i830_free_gatt_table,
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- .insert_memory = intel_i915_insert_entries,
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- .remove_memory = intel_i915_remove_entries,
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- .alloc_by_type = intel_i830_alloc_by_type,
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- .free_by_type = intel_i810_free_by_type,
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- .agp_alloc_page = agp_generic_alloc_page,
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- .agp_destroy_page = agp_generic_destroy_page,
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- .agp_type_to_mask_type = intel_i830_type_to_mask_type,
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+ .owner = THIS_MODULE,
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+ .aperture_sizes = intel_i830_sizes,
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+ .size_type = FIXED_APER_SIZE,
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+ .num_aperture_sizes = 4,
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+ .needs_scratch_page = true,
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+ .configure = intel_i915_configure,
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+ .fetch_size = intel_i9xx_fetch_size,
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+ .cleanup = intel_i915_cleanup,
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+ .tlb_flush = intel_i810_tlbflush,
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+ .mask_memory = intel_i965_mask_memory,
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+ .masks = intel_i810_masks,
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+ .agp_enable = intel_i810_agp_enable,
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+ .cache_flush = global_cache_flush,
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+ .create_gatt_table = intel_i915_create_gatt_table,
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+ .free_gatt_table = intel_i830_free_gatt_table,
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+ .insert_memory = intel_i915_insert_entries,
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+ .remove_memory = intel_i915_remove_entries,
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+ .alloc_by_type = intel_i830_alloc_by_type,
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+ .free_by_type = intel_i810_free_by_type,
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+ .agp_alloc_page = agp_generic_alloc_page,
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+ .agp_destroy_page = agp_generic_destroy_page,
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+ .agp_type_to_mask_type = intel_i830_type_to_mask_type,
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.chipset_flush = intel_i915_chipset_flush,
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};
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@@ -2063,6 +2117,12 @@ static const struct intel_driver_description {
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NULL, &intel_g33_driver },
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{ PCI_DEVICE_ID_INTEL_IGD_HB, PCI_DEVICE_ID_INTEL_IGD_IG, 0,
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"Intel Integrated Graphics Device", NULL, &intel_i965_driver },
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+ { PCI_DEVICE_ID_INTEL_IGD_E_HB, PCI_DEVICE_ID_INTEL_IGD_E_IG, 0,
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|
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+ "Intel Integrated Graphics Device", NULL, &intel_i965_driver },
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|
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+ { PCI_DEVICE_ID_INTEL_Q45_HB, PCI_DEVICE_ID_INTEL_Q45_IG, 0,
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|
|
+ "Q45/Q43", NULL, &intel_i965_driver },
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|
|
+ { PCI_DEVICE_ID_INTEL_G45_HB, PCI_DEVICE_ID_INTEL_G45_IG, 0,
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|
|
+ "G45/G43", NULL, &intel_i965_driver },
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|
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{ 0, 0, 0, NULL, NULL, NULL }
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};
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|
@@ -2254,6 +2314,9 @@ static struct pci_device_id agp_intel_pci_table[] = {
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ID(PCI_DEVICE_ID_INTEL_Q35_HB),
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ID(PCI_DEVICE_ID_INTEL_Q33_HB),
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|
ID(PCI_DEVICE_ID_INTEL_IGD_HB),
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|
+ ID(PCI_DEVICE_ID_INTEL_IGD_E_HB),
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|
+ ID(PCI_DEVICE_ID_INTEL_Q45_HB),
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|
+ ID(PCI_DEVICE_ID_INTEL_G45_HB),
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{ }
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};
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