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@@ -798,47 +798,18 @@ static int hw_reset_phy(struct zd_chip *chip)
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static int zd1211_hw_init_hmac(struct zd_chip *chip)
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{
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static const struct zd_ioreq32 ioreqs[] = {
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- { CR_ACK_TIMEOUT_EXT, 0x20 },
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- { CR_ADDA_MBIAS_WARMTIME, 0x30000808 },
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{ CR_ZD1211_RETRY_MAX, 0x2 },
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- { CR_SNIFFER_ON, 0 },
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- { CR_RX_FILTER, STA_RX_FILTER },
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- { CR_GROUP_HASH_P1, 0x00 },
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- { CR_GROUP_HASH_P2, 0x80000000 },
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- { CR_REG1, 0xa4 },
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- { CR_ADDA_PWR_DWN, 0x7f },
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- { CR_BCN_PLCP_CFG, 0x00f00401 },
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- { CR_PHY_DELAY, 0x00 },
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- { CR_ACK_TIMEOUT_EXT, 0x80 },
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- { CR_ADDA_PWR_DWN, 0x00 },
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- { CR_ACK_TIME_80211, 0x100 },
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- { CR_RX_PE_DELAY, 0x70 },
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- { CR_PS_CTRL, 0x10000000 },
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- { CR_RTS_CTS_RATE, 0x02030203 },
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{ CR_RX_THRESHOLD, 0x000c0640 },
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- { CR_AFTER_PNP, 0x1 },
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- { CR_WEP_PROTECT, 0x114 },
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};
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- int r;
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-
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dev_dbg_f(zd_chip_dev(chip), "\n");
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ZD_ASSERT(mutex_is_locked(&chip->mutex));
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- r = zd_iowrite32a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
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-#ifdef DEBUG
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- if (r) {
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- dev_err(zd_chip_dev(chip),
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- "error in zd_iowrite32a_locked. Error number %d\n", r);
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- }
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-#endif /* DEBUG */
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- return r;
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+ return zd_iowrite32a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
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}
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static int zd1211b_hw_init_hmac(struct zd_chip *chip)
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{
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static const struct zd_ioreq32 ioreqs[] = {
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- { CR_ACK_TIMEOUT_EXT, 0x20 },
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- { CR_ADDA_MBIAS_WARMTIME, 0x30000808 },
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{ CR_ZD1211B_RETRY_MAX, 0x02020202 },
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{ CR_ZD1211B_TX_PWR_CTL4, 0x007f003f },
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{ CR_ZD1211B_TX_PWR_CTL3, 0x007f003f },
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@@ -847,6 +818,20 @@ static int zd1211b_hw_init_hmac(struct zd_chip *chip)
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{ CR_ZD1211B_AIFS_CTL1, 0x00280028 },
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{ CR_ZD1211B_AIFS_CTL2, 0x008C003C },
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{ CR_ZD1211B_TXOP, 0x01800824 },
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+ { CR_RX_THRESHOLD, 0x000c0eff, },
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+ };
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+
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+ dev_dbg_f(zd_chip_dev(chip), "\n");
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+ ZD_ASSERT(mutex_is_locked(&chip->mutex));
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+ return zd_iowrite32a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
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+}
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+
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+static int hw_init_hmac(struct zd_chip *chip)
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+{
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+ int r;
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+ static const struct zd_ioreq32 ioreqs[] = {
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+ { CR_ACK_TIMEOUT_EXT, 0x20 },
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+ { CR_ADDA_MBIAS_WARMTIME, 0x30000808 },
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{ CR_SNIFFER_ON, 0 },
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{ CR_RX_FILTER, STA_RX_FILTER },
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{ CR_GROUP_HASH_P1, 0x00 },
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@@ -861,25 +846,16 @@ static int zd1211b_hw_init_hmac(struct zd_chip *chip)
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{ CR_RX_PE_DELAY, 0x70 },
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{ CR_PS_CTRL, 0x10000000 },
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{ CR_RTS_CTS_RATE, 0x02030203 },
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- { CR_RX_THRESHOLD, 0x000c0eff, },
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{ CR_AFTER_PNP, 0x1 },
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{ CR_WEP_PROTECT, 0x114 },
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+ { CR_IFS_VALUE, IFS_VALUE_DEFAULT },
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};
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- int r;
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-
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- dev_dbg_f(zd_chip_dev(chip), "\n");
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ZD_ASSERT(mutex_is_locked(&chip->mutex));
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r = zd_iowrite32a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
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- if (r) {
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- dev_dbg_f(zd_chip_dev(chip),
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- "error in zd_iowrite32a_locked. Error number %d\n", r);
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- }
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- return r;
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-}
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+ if (r)
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+ return r;
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-static int hw_init_hmac(struct zd_chip *chip)
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-{
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return chip->is_zd1211b ?
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zd1211b_hw_init_hmac(chip) : zd1211_hw_init_hmac(chip);
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}
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@@ -974,13 +950,6 @@ static int hw_init(struct zd_chip *chip)
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if (r)
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return r;
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- /* Although the vendor driver defaults to a different value during
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- * init, it overwrites the IFS value with the following every time
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- * the channel changes. We should aim to be more intelligent... */
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- r = zd_iowrite32_locked(chip, IFS_VALUE_DEFAULT, CR_IFS_VALUE);
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- if (r)
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- return r;
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-
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return set_beacon_interval(chip, 100);
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}
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