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@@ -32,11 +32,12 @@ extern struct bus_type spi_bus_type;
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* @max_speed_hz: Maximum clock rate to be used with this chip
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* (on this board); may be changed by the device's driver.
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* The spi_transfer.speed_hz can override this for each transfer.
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- * @chip-select: Chipselect, distinguishing chips handled by "master".
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+ * @chip_select: Chipselect, distinguishing chips handled by @master.
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* @mode: The spi mode defines how data is clocked out and in.
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* This may be changed by the device's driver.
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- * The "active low" default for chipselect mode can be overridden,
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- * as can the "MSB first" default for each word in a transfer.
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+ * The "active low" default for chipselect mode can be overridden
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+ * (by specifying SPI_CS_HIGH) as can the "MSB first" default for
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+ * each word in a transfer (by specifying SPI_LSB_FIRST).
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* @bits_per_word: Data transfers involve one or more words; word sizes
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* like eight or 12 bits are common. In-memory wordsizes are
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* powers of two bytes (e.g. 20 bit samples use 32 bits).
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@@ -48,14 +49,18 @@ extern struct bus_type spi_bus_type;
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* @controller_state: Controller's runtime state
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* @controller_data: Board-specific definitions for controller, such as
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* FIFO initialization parameters; from board_info.controller_data
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+ * @modalias: Name of the driver to use with this device, or an alias
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+ * for that name. This appears in the sysfs "modalias" attribute
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+ * for driver coldplugging, and in uevents used for hotplugging
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*
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- * An spi_device is used to interchange data between an SPI slave
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+ * A @spi_device is used to interchange data between an SPI slave
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* (usually a discrete chip) and CPU memory.
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*
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- * In "dev", the platform_data is used to hold information about this
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+ * In @dev, the platform_data is used to hold information about this
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* device that's meaningful to the device's protocol driver, but not
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* to its controller. One example might be an identifier for a chip
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- * variant with slightly different functionality.
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+ * variant with slightly different functionality; another might be
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+ * information about how this particular board wires the chip's pins.
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*/
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struct spi_device {
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struct device dev;
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@@ -77,13 +82,15 @@ struct spi_device {
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void *controller_data;
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const char *modalias;
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- // likely need more hooks for more protocol options affecting how
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- // the controller talks to each chip, like:
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- // - memory packing (12 bit samples into low bits, others zeroed)
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- // - priority
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- // - drop chipselect after each word
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- // - chipselect delays
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- // - ...
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+ /*
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+ * likely need more hooks for more protocol options affecting how
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+ * the controller talks to each chip, like:
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+ * - memory packing (12 bit samples into low bits, others zeroed)
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+ * - priority
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+ * - drop chipselect after each word
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+ * - chipselect delays
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+ * - ...
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+ */
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};
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static inline struct spi_device *to_spi_device(struct device *dev)
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@@ -146,6 +153,11 @@ static inline struct spi_driver *to_spi_driver(struct device_driver *drv)
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extern int spi_register_driver(struct spi_driver *sdrv);
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+/**
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+ * spi_unregister_driver - reverse effect of spi_register_driver
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+ * @sdrv: the driver to unregister
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+ * Context: can sleep
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+ */
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static inline void spi_unregister_driver(struct spi_driver *sdrv)
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{
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if (sdrv)
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@@ -165,18 +177,20 @@ static inline void spi_unregister_driver(struct spi_driver *sdrv)
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* @setup: updates the device mode and clocking records used by a
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* device's SPI controller; protocol code may call this. This
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* must fail if an unrecognized or unsupported mode is requested.
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+ * It's always safe to call this unless transfers are pending on
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+ * the device whose settings are being modified.
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* @transfer: adds a message to the controller's transfer queue.
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* @cleanup: frees controller-specific state
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*
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- * Each SPI master controller can communicate with one or more spi_device
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+ * Each SPI master controller can communicate with one or more @spi_device
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* children. These make a small bus, sharing MOSI, MISO and SCK signals
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* but not chip select signals. Each device may be configured to use a
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* different clock rate, since those shared signals are ignored unless
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* the chip is selected.
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*
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* The driver for an SPI controller manages access to those devices through
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- * a queue of spi_message transactions, copyin data between CPU memory and
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- * an SPI slave device). For each such message it queues, it calls the
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+ * a queue of spi_message transactions, copying data between CPU memory and
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+ * an SPI slave device. For each such message it queues, it calls the
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* message's completion function when the transaction completes.
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*/
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struct spi_master {
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@@ -280,27 +294,27 @@ extern struct spi_master *spi_busnum_to_master(u16 busnum);
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* struct spi_transfer - a read/write buffer pair
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* @tx_buf: data to be written (dma-safe memory), or NULL
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* @rx_buf: data to be read (dma-safe memory), or NULL
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- * @tx_dma: DMA address of tx_buf, if spi_message.is_dma_mapped
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- * @rx_dma: DMA address of rx_buf, if spi_message.is_dma_mapped
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+ * @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped
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+ * @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped
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* @len: size of rx and tx buffers (in bytes)
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* @speed_hz: Select a speed other then the device default for this
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- * transfer. If 0 the default (from spi_device) is used.
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+ * transfer. If 0 the default (from @spi_device) is used.
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* @bits_per_word: select a bits_per_word other then the device default
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- * for this transfer. If 0 the default (from spi_device) is used.
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+ * for this transfer. If 0 the default (from @spi_device) is used.
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* @cs_change: affects chipselect after this transfer completes
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* @delay_usecs: microseconds to delay after this transfer before
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* (optionally) changing the chipselect status, then starting
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- * the next transfer or completing this spi_message.
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- * @transfer_list: transfers are sequenced through spi_message.transfers
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+ * the next transfer or completing this @spi_message.
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+ * @transfer_list: transfers are sequenced through @spi_message.transfers
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*
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* SPI transfers always write the same number of bytes as they read.
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- * Protocol drivers should always provide rx_buf and/or tx_buf.
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+ * Protocol drivers should always provide @rx_buf and/or @tx_buf.
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* In some cases, they may also want to provide DMA addresses for
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* the data being transferred; that may reduce overhead, when the
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* underlying driver uses dma.
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*
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* If the transmit buffer is null, zeroes will be shifted out
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- * while filling rx_buf. If the receive buffer is null, the data
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+ * while filling @rx_buf. If the receive buffer is null, the data
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* shifted in will be discarded. Only "len" bytes shift out (or in).
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* It's an error to try to shift out a partial word. (For example, by
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* shifting out three bytes with word size of sixteen or twenty bits;
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@@ -309,7 +323,7 @@ extern struct spi_master *spi_busnum_to_master(u16 busnum);
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* In-memory data values are always in native CPU byte order, translated
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* from the wire byte order (big-endian except with SPI_LSB_FIRST). So
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* for example when bits_per_word is sixteen, buffers are 2N bytes long
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- * and hold N sixteen bit words in CPU byte order.
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+ * (@len = 2N) and hold N sixteen bit words in CPU byte order.
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*
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* When the word size of the SPI transfer is not a power-of-two multiple
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* of eight bits, those in-memory words include extra bits. In-memory
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@@ -318,7 +332,7 @@ extern struct spi_master *spi_busnum_to_master(u16 busnum);
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*
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* All SPI transfers start with the relevant chipselect active. Normally
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* it stays selected until after the last transfer in a message. Drivers
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- * can affect the chipselect signal using cs_change:
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+ * can affect the chipselect signal using cs_change.
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*
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* (i) If the transfer isn't the last one in the message, this flag is
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* used to make the chipselect briefly go inactive in the middle of the
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@@ -372,7 +386,7 @@ struct spi_transfer {
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* @queue: for use by whichever driver currently owns the message
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* @state: for use by whichever driver currently owns the message
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*
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- * An spi_message is used to execute an atomic sequence of data transfers,
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+ * A @spi_message is used to execute an atomic sequence of data transfers,
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* each represented by a struct spi_transfer. The sequence is "atomic"
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* in the sense that no other spi_message may use that SPI bus until that
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* sequence completes. On some systems, many such sequences can execute as
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@@ -464,8 +478,9 @@ static inline void spi_message_free(struct spi_message *m)
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}
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/**
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- * spi_setup -- setup SPI mode and clock rate
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+ * spi_setup - setup SPI mode and clock rate
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* @spi: the device whose settings are being modified
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+ * Context: can sleep
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*
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* SPI protocol drivers may need to update the transfer mode if the
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* device doesn't work with the mode 0 default. They may likewise need
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@@ -474,7 +489,7 @@ static inline void spi_message_free(struct spi_message *m)
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* The changes take effect the next time the device is selected and data
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* is transferred to or from it.
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*
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- * Note that this call wil fail if the protocol driver specifies an option
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+ * Note that this call will fail if the protocol driver specifies an option
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* that the underlying controller or its driver does not support. For
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* example, not all hardware supports wire transfers using nine bit words,
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* LSB-first wire encoding, or active-high chipselects.
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@@ -487,9 +502,10 @@ spi_setup(struct spi_device *spi)
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/**
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- * spi_async -- asynchronous SPI transfer
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+ * spi_async - asynchronous SPI transfer
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* @spi: device with which data will be exchanged
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* @message: describes the data transfers, including completion callback
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+ * Context: any (irqs may be blocked, etc)
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*
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* This call may be used in_irq and other contexts which can't sleep,
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* as well as from task contexts which can sleep.
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@@ -535,6 +551,7 @@ extern int spi_sync(struct spi_device *spi, struct spi_message *message);
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* @spi: device to which data will be written
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* @buf: data buffer
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* @len: data buffer size
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+ * Context: can sleep
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*
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* This writes the buffer and returns zero or a negative error code.
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* Callable only from contexts that can sleep.
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@@ -558,8 +575,9 @@ spi_write(struct spi_device *spi, const u8 *buf, size_t len)
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* @spi: device from which data will be read
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* @buf: data buffer
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* @len: data buffer size
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+ * Context: can sleep
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*
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- * This writes the buffer and returns zero or a negative error code.
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+ * This reads the buffer and returns zero or a negative error code.
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* Callable only from contexts that can sleep.
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*/
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static inline int
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@@ -585,6 +603,7 @@ extern int spi_write_then_read(struct spi_device *spi,
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* spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read
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* @spi: device with which data will be exchanged
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* @cmd: command to be written before data is read back
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+ * Context: can sleep
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*
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* This returns the (unsigned) eight bit number returned by the
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* device, or else a negative error code. Callable only from
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@@ -605,6 +624,7 @@ static inline ssize_t spi_w8r8(struct spi_device *spi, u8 cmd)
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* spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read
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* @spi: device with which data will be exchanged
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* @cmd: command to be written before data is read back
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+ * Context: can sleep
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*
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* This returns the (unsigned) sixteen bit number returned by the
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* device, or else a negative error code. Callable only from
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