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@@ -261,11 +261,9 @@ static inline void wait_for_flush(void)
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*/
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static inline void __dc_entire_op(const int cacheop)
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{
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- unsigned long flags, tmp = tmp;
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+ unsigned int tmp = tmp;
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int aux;
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- local_irq_save(flags);
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-
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if (cacheop == OP_FLUSH_N_INV) {
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/* Dcache provides 2 cmd: FLUSH or INV
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* INV inturn has sub-modes: DISCARD or FLUSH-BEFORE
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@@ -289,8 +287,6 @@ static inline void __dc_entire_op(const int cacheop)
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/* Switch back the DISCARD ONLY Invalidate mode */
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if (cacheop == OP_FLUSH_N_INV)
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write_aux_reg(ARC_REG_DC_CTRL, tmp & ~DC_CTRL_INV_MODE_FLUSH);
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-
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- local_irq_restore(flags);
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}
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/*
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@@ -481,8 +477,15 @@ static void __ic_line_inv_vaddr(unsigned long paddr, unsigned long vaddr,
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local_irq_restore(flags);
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}
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+static inline void __ic_entire_inv(void)
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+{
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+ write_aux_reg(ARC_REG_IC_IVIC, 1);
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+ read_aux_reg(ARC_REG_IC_CTRL); /* blocks */
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+}
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+
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#else
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+#define __ic_entire_inv()
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#define __ic_line_inv_vaddr(pstart, vstart, sz)
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#endif /* CONFIG_ARC_HAS_ICACHE */
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@@ -651,26 +654,13 @@ void ___flush_dcache_page(unsigned long paddr, unsigned long vaddr)
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__dc_line_op(paddr, vaddr & PAGE_MASK, PAGE_SIZE, OP_FLUSH_N_INV);
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}
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-void flush_icache_all(void)
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-{
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- unsigned long flags;
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-
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- local_irq_save(flags);
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-
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- write_aux_reg(ARC_REG_IC_IVIC, 1);
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-
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- /* lr will not complete till the icache inv operation is not over */
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- read_aux_reg(ARC_REG_IC_CTRL);
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- local_irq_restore(flags);
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-}
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-
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noinline void flush_cache_all(void)
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{
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unsigned long flags;
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local_irq_save(flags);
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- flush_icache_all();
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+ __ic_entire_inv();
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__dc_entire_op(OP_FLUSH_N_INV);
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local_irq_restore(flags);
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