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@@ -3453,6 +3453,11 @@ static void cpt_init_clock_gating(struct drm_device *dev)
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I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE);
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I915_WRITE(SOUTH_CHICKEN2, I915_READ(SOUTH_CHICKEN2) |
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DPLS_EDP_PPS_FIX_DIS);
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+ /* The below fixes the weird display corruption, a few pixels shifted
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+ * downward, on (only) LVDS of some HP laptops with IVY.
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+ */
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+ for_each_pipe(pipe)
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+ I915_WRITE(TRANS_CHICKEN2(pipe), TRANS_CHICKEN2_TIMING_OVERRIDE);
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/* WADP0ClockGatingDisable */
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for_each_pipe(pipe) {
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I915_WRITE(TRANS_CHICKEN1(pipe),
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