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@@ -221,22 +221,20 @@ void flush_cache_sigtramp(unsigned long addr)
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static inline void flush_cache_4096(unsigned long start,
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unsigned long phys)
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{
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+ unsigned long flags, exec_offset = 0;
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+
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/*
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* All types of SH-4 require PC to be in P2 to operate on the I-cache.
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* Some types of SH-4 require PC to be in P2 to operate on the D-cache.
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*/
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if ((cpu_data->flags & CPU_HAS_P2_FLUSH_BUG) ||
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- (start < CACHE_OC_ADDRESS_ARRAY)) {
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- unsigned long flags;
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-
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- local_irq_save(flags);
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- __flush_cache_4096(start | SH_CACHE_ASSOC,
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- P1SEGADDR(phys), 0x20000000);
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- local_irq_restore(flags);
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- } else {
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- __flush_cache_4096(start | SH_CACHE_ASSOC,
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- P1SEGADDR(phys), 0);
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- }
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+ (start < CACHE_OC_ADDRESS_ARRAY))
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+ exec_offset = 0x20000000;
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+
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+ local_irq_save(flags);
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+ __flush_cache_4096(start | SH_CACHE_ASSOC,
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+ P1SEGADDR(phys), exec_offset);
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+ local_irq_restore(flags);
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}
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/*
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