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@@ -0,0 +1,66 @@
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+/*
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+ * P1020 RDB Device Tree Source (36-bit address map)
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+ *
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+ * Copyright 2009-2011 Freescale Semiconductor Inc.
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License as published by the
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+ * Free Software Foundation; either version 2 of the License, or (at your
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+ * option) any later version.
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+ */
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+
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+/include/ "fsl/p1020si-pre.dtsi"
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+/ {
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+ model = "fsl,P1020RDB";
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+ compatible = "fsl,P1020RDB";
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+
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+ memory {
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+ device_type = "memory";
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+ };
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+
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+ board_lbc: lbc: localbus@fffe05000 {
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+ reg = <0xf 0xffe05000 0 0x1000>;
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+
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+ /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
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+ ranges = <0x0 0x0 0xf 0xef000000 0x01000000
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+ 0x1 0x0 0xf 0xffa00000 0x00040000
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+ 0x2 0x0 0xf 0xffb00000 0x00020000>;
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+ };
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+
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+ board_soc: soc: soc@fffe00000 {
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+ ranges = <0x0 0xf 0xffe00000 0x100000>;
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+ };
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+
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+ pci0: pcie@fffe09000 {
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+ reg = <0xf 0xffe09000 0 0x1000>;
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+ ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
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+ 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
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+ pcie@0 {
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+ ranges = <0x2000000 0x0 0xc0000000
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+ 0x2000000 0x0 0xc0000000
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+ 0x0 0x20000000
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+
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+ 0x1000000 0x0 0x0
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+ 0x1000000 0x0 0x0
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+ 0x0 0x100000>;
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+ };
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+ };
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+
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+ pci1: pcie@fffe0a000 {
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+ reg = <0xf 0xffe0a000 0 0x1000>;
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+ ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
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+ 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
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+ pcie@0 {
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+ ranges = <0x2000000 0x0 0x80000000
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+ 0x2000000 0x0 0x80000000
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+ 0x0 0x20000000
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+
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+ 0x1000000 0x0 0x0
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+ 0x1000000 0x0 0x0
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+ 0x0 0x100000>;
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+ };
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+ };
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+};
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+
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+/include/ "p1020rdb.dtsi"
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+/include/ "fsl/p1020si-post.dtsi"
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