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+/*
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+ * Celleb/Beat Interrupt controller
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+ *
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+ * (C) Copyright 2006-2007 TOSHIBA CORPORATION
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License along
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+ * with this program; if not, write to the Free Software Foundation, Inc.,
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+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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+ */
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+
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+#include <linux/init.h>
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+#include <linux/interrupt.h>
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+#include <linux/irq.h>
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+#include <linux/percpu.h>
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+#include <linux/types.h>
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+
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+#include <asm/machdep.h>
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+
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+#include "interrupt.h"
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+#include "beat_wrapper.h"
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+
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+#define MAX_IRQS NR_IRQS
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+static DEFINE_SPINLOCK(beatic_irq_mask_lock);
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+static uint64_t beatic_irq_mask_enable[(MAX_IRQS+255)/64];
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+static uint64_t beatic_irq_mask_ack[(MAX_IRQS+255)/64];
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+
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+static struct irq_host *beatic_host = NULL;
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+
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+/*
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+ * In this implementation, "virq" == "IRQ plug number",
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+ * "(irq_hw_number_t)hwirq" == "IRQ outlet number".
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+ */
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+
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+/* assumption: locked */
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+static inline void beatic_update_irq_mask(unsigned int irq_plug)
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+{
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+ int off;
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+ unsigned long masks[4];
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+
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+ off = (irq_plug / 256) * 4;
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+ masks[0] = beatic_irq_mask_enable[off + 0]
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+ & beatic_irq_mask_ack[off + 0];
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+ masks[1] = beatic_irq_mask_enable[off + 1]
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+ & beatic_irq_mask_ack[off + 1];
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+ masks[2] = beatic_irq_mask_enable[off + 2]
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+ & beatic_irq_mask_ack[off + 2];
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+ masks[3] = beatic_irq_mask_enable[off + 3]
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+ & beatic_irq_mask_ack[off + 3];
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+ if (beat_set_interrupt_mask(irq_plug&~255UL,
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+ masks[0], masks[1], masks[2], masks[3]) != 0)
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+ panic("Failed to set mask IRQ!");
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+}
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+
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+static void beatic_mask_irq(unsigned int irq_plug)
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+{
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+ unsigned long flags;
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+
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+ spin_lock_irqsave(&beatic_irq_mask_lock, flags);
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+ beatic_irq_mask_enable[irq_plug/64] &= ~(1UL << (63 - (irq_plug%64)));
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+ beatic_update_irq_mask(irq_plug);
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+ spin_unlock_irqrestore(&beatic_irq_mask_lock, flags);
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+}
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+
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+static void beatic_unmask_irq(unsigned int irq_plug)
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+{
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+ unsigned long flags;
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+
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+ spin_lock_irqsave(&beatic_irq_mask_lock, flags);
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+ beatic_irq_mask_enable[irq_plug/64] |= 1UL << (63 - (irq_plug%64));
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+ beatic_update_irq_mask(irq_plug);
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+ spin_unlock_irqrestore(&beatic_irq_mask_lock, flags);
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+}
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+
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+static void beatic_ack_irq(unsigned int irq_plug)
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+{
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+ unsigned long flags;
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+
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+ spin_lock_irqsave(&beatic_irq_mask_lock, flags);
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+ beatic_irq_mask_ack[irq_plug/64] &= ~(1UL << (63 - (irq_plug%64)));
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+ beatic_update_irq_mask(irq_plug);
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+ spin_unlock_irqrestore(&beatic_irq_mask_lock, flags);
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+}
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+
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+static void beatic_end_irq(unsigned int irq_plug)
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+{
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+ s64 err;
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+ unsigned long flags;
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+
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+ if ((err = beat_downcount_of_interrupt(irq_plug)) != 0) {
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+ if ((err & 0xFFFFFFFF) != 0xFFFFFFF5) /* -11: wrong state */
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+ panic("Failed to downcount IRQ! Error = %16lx", err);
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+
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+ printk(KERN_ERR "IRQ over-downcounted, plug %d\n", irq_plug);
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+ }
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+ spin_lock_irqsave(&beatic_irq_mask_lock, flags);
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+ beatic_irq_mask_ack[irq_plug/64] |= 1UL << (63 - (irq_plug%64));
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+ beatic_update_irq_mask(irq_plug);
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+ spin_unlock_irqrestore(&beatic_irq_mask_lock, flags);
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+}
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+
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+static struct irq_chip beatic_pic = {
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+ .typename = " CELL-BEAT ",
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+ .unmask = beatic_unmask_irq,
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+ .mask = beatic_mask_irq,
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+ .eoi = beatic_end_irq,
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+};
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+
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+/*
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+ * Dispose binding hardware IRQ number (hw) and Virtuql IRQ number (virq),
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+ * update flags.
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+ *
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+ * Note that the number (virq) is already assigned at upper layer.
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+ */
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+static void beatic_pic_host_unmap(struct irq_host *h, unsigned int virq)
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+{
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+ beat_destruct_irq_plug(virq);
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+}
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+
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+/*
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+ * Create or update binding hardware IRQ number (hw) and Virtuql
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+ * IRQ number (virq). This is called only once for a given mapping.
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+ *
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+ * Note that the number (virq) is already assigned at upper layer.
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+ */
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+static int beatic_pic_host_map(struct irq_host *h, unsigned int virq,
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+ irq_hw_number_t hw)
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+{
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+ struct irq_desc *desc = get_irq_desc(virq);
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+ int64_t err;
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+
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+ if ((err = beat_construct_and_connect_irq_plug(virq, hw)) < 0)
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+ return -EIO;
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+
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+ desc->status |= IRQ_LEVEL;
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+ set_irq_chip_and_handler(virq, &beatic_pic, handle_fasteoi_irq);
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+ return 0;
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+}
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+
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+/*
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+ * Update binding hardware IRQ number (hw) and Virtuql
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+ * IRQ number (virq). This is called only once for a given mapping.
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+ */
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+static void beatic_pic_host_remap(struct irq_host *h, unsigned int virq,
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+ irq_hw_number_t hw)
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+{
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+ beat_construct_and_connect_irq_plug(virq, hw);
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+}
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+
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+/*
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+ * Translate device-tree interrupt spec to irq_hw_number_t style (ulong),
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+ * to pass away to irq_create_mapping().
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+ *
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+ * Called from irq_create_of_mapping() only.
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+ * Note: We have only 1 entry to translate.
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+ */
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+static int beatic_pic_host_xlate(struct irq_host *h, struct device_node *ct,
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+ u32 *intspec, unsigned int intsize,
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+ irq_hw_number_t *out_hwirq,
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+ unsigned int *out_flags)
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+{
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+ u64 *intspec2 = (u64 *)intspec;
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+
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+ *out_hwirq = *intspec2;
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+ *out_flags |= IRQ_TYPE_LEVEL_LOW;
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+ return 0;
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+}
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+
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+static struct irq_host_ops beatic_pic_host_ops = {
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+ .map = beatic_pic_host_map,
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+ .remap = beatic_pic_host_remap,
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+ .unmap = beatic_pic_host_unmap,
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+ .xlate = beatic_pic_host_xlate,
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+};
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+
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+/*
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+ * Get an IRQ number
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+ * Note: returns VIRQ
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+ */
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+static inline unsigned int beatic_get_irq_plug(void)
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+{
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+ int i;
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+ uint64_t pending[4], ub;
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+
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+ for (i = 0; i < MAX_IRQS; i += 256) {
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+ beat_detect_pending_interrupts(i, pending);
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+ __asm__ ("cntlzd %0,%1":"=r"(ub):
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+ "r"(pending[0] & beatic_irq_mask_enable[i/64+0]
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+ & beatic_irq_mask_ack[i/64+0]));
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+ if (ub != 64)
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+ return i + ub + 0;
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+ __asm__ ("cntlzd %0,%1":"=r"(ub):
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+ "r"(pending[1] & beatic_irq_mask_enable[i/64+1]
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+ & beatic_irq_mask_ack[i/64+1]));
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+ if (ub != 64)
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+ return i + ub + 64;
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+ __asm__ ("cntlzd %0,%1":"=r"(ub):
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+ "r"(pending[2] & beatic_irq_mask_enable[i/64+2]
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+ & beatic_irq_mask_ack[i/64+2]));
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+ if (ub != 64)
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+ return i + ub + 128;
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+ __asm__ ("cntlzd %0,%1":"=r"(ub):
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+ "r"(pending[3] & beatic_irq_mask_enable[i/64+3]
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+ & beatic_irq_mask_ack[i/64+3]));
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+ if (ub != 64)
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+ return i + ub + 192;
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+ }
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+
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+ return NO_IRQ;
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+}
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+unsigned int beatic_get_irq(void)
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+{
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+ unsigned int ret;
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+
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+ ret = beatic_get_irq_plug();
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+ if (ret != NO_IRQ)
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+ beatic_ack_irq(ret);
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+ return ret;
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+}
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+
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+/*
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+ */
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+void __init beatic_init_IRQ(void)
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+{
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+ int i;
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+
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+ memset(beatic_irq_mask_enable, 0, sizeof(beatic_irq_mask_enable));
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+ memset(beatic_irq_mask_ack, 255, sizeof(beatic_irq_mask_ack));
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+ for (i = 0; i < MAX_IRQS; i += 256)
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+ beat_set_interrupt_mask(i, 0L, 0L, 0L, 0L);
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+
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+ /* Set out get_irq function */
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+ ppc_md.get_irq = beatic_get_irq;
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+
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+ /* Allocate an irq host */
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+ beatic_host = irq_alloc_host(IRQ_HOST_MAP_NOMAP, 0,
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+ &beatic_pic_host_ops,
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+ 0);
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+ BUG_ON(beatic_host == NULL);
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+ irq_set_default_host(beatic_host);
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+}
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+
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+#ifdef CONFIG_SMP
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+
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+/* Nullified to compile with SMP mode */
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+void beatic_setup_cpu(int cpu)
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+{
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+}
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+
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+void beatic_cause_IPI(int cpu, int mesg)
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+{
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+}
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+
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+void beatic_request_IPIs(void)
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+{
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+}
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+#endif /* CONFIG_SMP */
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+
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+void beatic_deinit_IRQ(void)
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+{
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+ int i;
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+
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+ for (i = 1; i < NR_IRQS; i++)
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+ beat_destruct_irq_plug(i);
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+}
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