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@@ -308,67 +308,6 @@ static u32 bnx2x_reg_rd_ind(struct bnx2x *bp, u32 addr)
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#define DMAE_DP_DST_PCI "pci dst_addr [%x:%08x]"
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#define DMAE_DP_DST_NONE "dst_addr [none]"
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-static void bnx2x_dp_dmae(struct bnx2x *bp, struct dmae_command *dmae,
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- int msglvl)
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-{
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- u32 src_type = dmae->opcode & DMAE_COMMAND_SRC;
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-
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- switch (dmae->opcode & DMAE_COMMAND_DST) {
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- case DMAE_CMD_DST_PCI:
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- if (src_type == DMAE_CMD_SRC_PCI)
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- DP(msglvl, "DMAE: opcode 0x%08x\n"
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- "src [%x:%08x], len [%d*4], dst [%x:%08x]\n"
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- "comp_addr [%x:%08x], comp_val 0x%08x\n",
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- dmae->opcode, dmae->src_addr_hi, dmae->src_addr_lo,
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- dmae->len, dmae->dst_addr_hi, dmae->dst_addr_lo,
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- dmae->comp_addr_hi, dmae->comp_addr_lo,
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- dmae->comp_val);
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- else
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- DP(msglvl, "DMAE: opcode 0x%08x\n"
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- "src [%08x], len [%d*4], dst [%x:%08x]\n"
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- "comp_addr [%x:%08x], comp_val 0x%08x\n",
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- dmae->opcode, dmae->src_addr_lo >> 2,
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- dmae->len, dmae->dst_addr_hi, dmae->dst_addr_lo,
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- dmae->comp_addr_hi, dmae->comp_addr_lo,
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- dmae->comp_val);
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- break;
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- case DMAE_CMD_DST_GRC:
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- if (src_type == DMAE_CMD_SRC_PCI)
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- DP(msglvl, "DMAE: opcode 0x%08x\n"
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- "src [%x:%08x], len [%d*4], dst_addr [%08x]\n"
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- "comp_addr [%x:%08x], comp_val 0x%08x\n",
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- dmae->opcode, dmae->src_addr_hi, dmae->src_addr_lo,
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- dmae->len, dmae->dst_addr_lo >> 2,
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- dmae->comp_addr_hi, dmae->comp_addr_lo,
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- dmae->comp_val);
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- else
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- DP(msglvl, "DMAE: opcode 0x%08x\n"
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- "src [%08x], len [%d*4], dst [%08x]\n"
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- "comp_addr [%x:%08x], comp_val 0x%08x\n",
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- dmae->opcode, dmae->src_addr_lo >> 2,
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- dmae->len, dmae->dst_addr_lo >> 2,
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- dmae->comp_addr_hi, dmae->comp_addr_lo,
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- dmae->comp_val);
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- break;
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- default:
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- if (src_type == DMAE_CMD_SRC_PCI)
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- DP(msglvl, "DMAE: opcode 0x%08x\n"
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- "src_addr [%x:%08x] len [%d * 4] dst_addr [none]\n"
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- "comp_addr [%x:%08x] comp_val 0x%08x\n",
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- dmae->opcode, dmae->src_addr_hi, dmae->src_addr_lo,
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- dmae->len, dmae->comp_addr_hi, dmae->comp_addr_lo,
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- dmae->comp_val);
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- else
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- DP(msglvl, "DMAE: opcode 0x%08x\n"
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- "src_addr [%08x] len [%d * 4] dst_addr [none]\n"
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- "comp_addr [%x:%08x] comp_val 0x%08x\n",
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- dmae->opcode, dmae->src_addr_lo >> 2,
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- dmae->len, dmae->comp_addr_hi, dmae->comp_addr_lo,
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- dmae->comp_val);
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- break;
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- }
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-
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-}
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/* copy command into DMAE command memory and set DMAE command go */
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void bnx2x_post_dmae(struct bnx2x *bp, struct dmae_command *dmae, int idx)
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@@ -505,8 +444,6 @@ void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr,
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dmae.dst_addr_hi = 0;
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dmae.len = len32;
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- bnx2x_dp_dmae(bp, &dmae, BNX2X_MSG_OFF);
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-
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/* issue the command and wait for completion */
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bnx2x_issue_dmae_with_comp(bp, &dmae);
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}
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@@ -539,8 +476,6 @@ void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32)
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dmae.dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, wb_data));
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dmae.len = len32;
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- bnx2x_dp_dmae(bp, &dmae, BNX2X_MSG_OFF);
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-
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/* issue the command and wait for completion */
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bnx2x_issue_dmae_with_comp(bp, &dmae);
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}
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@@ -561,27 +496,6 @@ static void bnx2x_write_dmae_phys_len(struct bnx2x *bp, dma_addr_t phys_addr,
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bnx2x_write_dmae(bp, phys_addr + offset, addr + offset, len);
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}
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-/* used only for slowpath so not inlined */
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-static void bnx2x_wb_wr(struct bnx2x *bp, int reg, u32 val_hi, u32 val_lo)
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-{
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- u32 wb_write[2];
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-
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- wb_write[0] = val_hi;
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- wb_write[1] = val_lo;
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- REG_WR_DMAE(bp, reg, wb_write, 2);
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-}
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-
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-#ifdef USE_WB_RD
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-static u64 bnx2x_wb_rd(struct bnx2x *bp, int reg)
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-{
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- u32 wb_data[2];
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-
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- REG_RD_DMAE(bp, reg, wb_data, 2);
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-
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- return HILO_U64(wb_data[0], wb_data[1]);
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-}
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-#endif
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-
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static int bnx2x_mc_assert(struct bnx2x *bp)
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{
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char last_idx;
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@@ -6639,13 +6553,16 @@ static int bnx2x_init_hw_port(struct bnx2x *bp)
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static void bnx2x_ilt_wr(struct bnx2x *bp, u32 index, dma_addr_t addr)
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{
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int reg;
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+ u32 wb_write[2];
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if (CHIP_IS_E1(bp))
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reg = PXP2_REG_RQ_ONCHIP_AT + index*8;
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else
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reg = PXP2_REG_RQ_ONCHIP_AT_B0 + index*8;
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- bnx2x_wb_wr(bp, reg, ONCHIP_ADDR1(addr), ONCHIP_ADDR2(addr));
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+ wb_write[0] = ONCHIP_ADDR1(addr);
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+ wb_write[1] = ONCHIP_ADDR2(addr);
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+ REG_WR_DMAE(bp, reg, wb_write, 2);
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}
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static inline void bnx2x_igu_clear_sb(struct bnx2x *bp, u8 idu_sb_id)
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