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@@ -1145,6 +1145,41 @@ static struct omap_hwmod omap54xx_mpu_hwmod = {
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},
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};
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+/*
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+ * 'spinlock' class
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+ * spinlock provides hardware assistance for synchronizing the processes
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+ * running on multiple processors
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+ */
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+
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+static struct omap_hwmod_class_sysconfig omap54xx_spinlock_sysc = {
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+ .rev_offs = 0x0000,
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+ .sysc_offs = 0x0010,
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+ .syss_offs = 0x0014,
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+ .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
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+ SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
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+ SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
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+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
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+ .sysc_fields = &omap_hwmod_sysc_type1,
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+};
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+
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+static struct omap_hwmod_class omap54xx_spinlock_hwmod_class = {
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+ .name = "spinlock",
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+ .sysc = &omap54xx_spinlock_sysc,
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+};
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+
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+/* spinlock */
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+static struct omap_hwmod omap54xx_spinlock_hwmod = {
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+ .name = "spinlock",
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+ .class = &omap54xx_spinlock_hwmod_class,
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+ .clkdm_name = "l4cfg_clkdm",
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+ .prcm = {
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+ .omap4 = {
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+ .clkctrl_offs = OMAP54XX_CM_L4CFG_SPINLOCK_CLKCTRL_OFFSET,
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+ .context_offs = OMAP54XX_RM_L4CFG_SPINLOCK_CONTEXT_OFFSET,
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+ },
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+ },
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+};
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+
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/*
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* 'timer' class
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* general purpose timer module with accurate 1ms tick
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@@ -2077,6 +2112,14 @@ static struct omap_hwmod_ocp_if omap54xx_l4_cfg__mpu = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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+/* l4_cfg -> spinlock */
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+static struct omap_hwmod_ocp_if omap54xx_l4_cfg__spinlock = {
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+ .master = &omap54xx_l4_cfg_hwmod,
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+ .slave = &omap54xx_spinlock_hwmod,
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+ .clk = "l4_root_clk_div",
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+ .user = OCP_USER_MPU | OCP_USER_SDMA,
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+};
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+
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/* l4_wkup -> timer1 */
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static struct omap_hwmod_ocp_if omap54xx_l4_wkup__timer1 = {
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.master = &omap54xx_l4_wkup_hwmod,
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@@ -2296,6 +2339,7 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = {
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&omap54xx_l4_per__mmc4,
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&omap54xx_l4_per__mmc5,
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&omap54xx_l4_cfg__mpu,
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+ &omap54xx_l4_cfg__spinlock,
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&omap54xx_l4_wkup__timer1,
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&omap54xx_l4_per__timer2,
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&omap54xx_l4_per__timer3,
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