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@@ -1470,7 +1470,8 @@ intel_dp_link_down(struct intel_dp *intel_dp)
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if (!HAS_PCH_CPT(dev) &&
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I915_READ(intel_dp->output_reg) & DP_PIPEB_SELECT) {
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- struct intel_crtc *intel_crtc = to_intel_crtc(intel_dp->base.base.crtc);
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+ struct drm_crtc *crtc = intel_dp->base.base.crtc;
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+
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/* Hardware workaround: leaving our transcoder select
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* set to transcoder B while it's off will prevent the
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* corresponding HDMI output on transcoder A.
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@@ -1485,7 +1486,19 @@ intel_dp_link_down(struct intel_dp *intel_dp)
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/* Changes to enable or select take place the vblank
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* after being written.
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*/
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- intel_wait_for_vblank(dev, intel_crtc->pipe);
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+ if (crtc == NULL) {
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+ /* We can arrive here never having been attached
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+ * to a CRTC, for instance, due to inheriting
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+ * random state from the BIOS.
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+ *
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+ * If the pipe is not running, play safe and
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+ * wait for the clocks to stabilise before
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+ * continuing.
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+ */
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+ POSTING_READ(intel_dp->output_reg);
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+ msleep(50);
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+ } else
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+ intel_wait_for_vblank(dev, to_intel_crtc(crtc)->pipe);
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}
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I915_WRITE(intel_dp->output_reg, DP & ~DP_PORT_EN);
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