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@@ -692,9 +692,9 @@ static const u16 default_queue_to_tx_fifo[] = {
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static int iwl4965_alive_notify(struct iwl_priv *priv)
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{
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u32 a;
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- int i = 0;
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unsigned long flags;
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int ret;
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+ int i, chan;
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spin_lock_irqsave(&priv->lock, flags);
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@@ -718,6 +718,12 @@ static int iwl4965_alive_notify(struct iwl_priv *priv)
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iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
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priv->scd_bc_tbls.dma >> 10);
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+ /* Enable DMA channel */
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+ for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++)
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+ iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
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+ FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
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+ FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
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+
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/* Disable chain mode for all queues */
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iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
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@@ -748,7 +754,7 @@ static int iwl4965_alive_notify(struct iwl_priv *priv)
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(1 << priv->hw_params.max_txq_num) - 1);
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/* Activate all Tx DMA/FIFO channels */
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- priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 7));
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+ priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 6));
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iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
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