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sh: CPU flags in AT_HWCAP in ELF auxvt.

Encode processor flags in AT_HWCAP in the ELF auxiliary vector.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Paul Mundt 18 years ago
parent
commit
315bb96824
4 changed files with 27 additions and 18 deletions
  1. 5 3
      arch/sh/kernel/cpu/sh4/probe.c
  2. 15 0
      include/asm-sh/cpu-features.h
  3. 6 4
      include/asm-sh/elf.h
  4. 1 11
      include/asm-sh/processor.h

+ 5 - 3
arch/sh/kernel/cpu/sh4/probe.c

@@ -76,6 +76,7 @@ int __init detect_cpu_and_cache_system(void)
 		cpu_data->type = CPU_SH73180;
 		cpu_data->type = CPU_SH73180;
 		cpu_data->icache.ways = 4;
 		cpu_data->icache.ways = 4;
 		cpu_data->dcache.ways = 4;
 		cpu_data->dcache.ways = 4;
+		cpu_data->flags |= CPU_HAS_LLSC;
 		break;
 		break;
 	case 0x2001:
 	case 0x2001:
 	case 0x2004:
 	case 0x2004:
@@ -83,7 +84,7 @@ int __init detect_cpu_and_cache_system(void)
 		cpu_data->icache.ways = 4;
 		cpu_data->icache.ways = 4;
 		cpu_data->dcache.ways = 4;
 		cpu_data->dcache.ways = 4;
 
 
-		cpu_data->flags |= CPU_HAS_FPU;
+		cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_LLSC;
 		break;
 		break;
 	case 0x2006:
 	case 0x2006:
 	case 0x200A:
 	case 0x200A:
@@ -95,13 +96,15 @@ int __init detect_cpu_and_cache_system(void)
 		cpu_data->icache.ways = 4;
 		cpu_data->icache.ways = 4;
 		cpu_data->dcache.ways = 4;
 		cpu_data->dcache.ways = 4;
 
 
-		cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER;
+		cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER |
+				   CPU_HAS_LLSC;
 		break;
 		break;
 	case 0x3000:
 	case 0x3000:
 	case 0x3003:
 	case 0x3003:
 		cpu_data->type = CPU_SH7343;
 		cpu_data->type = CPU_SH7343;
 		cpu_data->icache.ways = 4;
 		cpu_data->icache.ways = 4;
 		cpu_data->dcache.ways = 4;
 		cpu_data->dcache.ways = 4;
+		cpu_data->flags |= CPU_HAS_LLSC;
 		break;
 		break;
 	case 0x8000:
 	case 0x8000:
 		cpu_data->type = CPU_ST40RA;
 		cpu_data->type = CPU_ST40RA;
@@ -180,4 +183,3 @@ int __init detect_cpu_and_cache_system(void)
 
 
 	return 0;
 	return 0;
 }
 }
-

+ 15 - 0
include/asm-sh/cpu-features.h

@@ -0,0 +1,15 @@
+#ifndef __ASM_SH_CPU_FEATURES_H
+#define __ASM_SH_CPU_FEATURES_H
+
+/*
+ * Processor flags
+ */
+#define CPU_HAS_FPU		0x0001	/* Hardware FPU support */
+#define CPU_HAS_P2_FLUSH_BUG	0x0002	/* Need to flush the cache in P2 area */
+#define CPU_HAS_MMU_PAGE_ASSOC	0x0004	/* SH3: TLB way selection bit support */
+#define CPU_HAS_DSP		0x0008	/* SH-DSP: DSP support */
+#define CPU_HAS_PERF_COUNTER	0x0010	/* Hardware performance counters */
+#define CPU_HAS_PTEA		0x0020	/* PTEA register */
+#define CPU_HAS_LLSC		0x0040	/* movli.l/movco.l */
+
+#endif /* __ASM_SH_CPU_FEATURES_H */

+ 6 - 4
include/asm-sh/elf.h

@@ -1,6 +1,11 @@
 #ifndef __ASM_SH_ELF_H
 #ifndef __ASM_SH_ELF_H
 #define __ASM_SH_ELF_H
 #define __ASM_SH_ELF_H
 
 
+#include <asm/processor.h>
+#include <asm/auxvec.h>
+#include <asm/ptrace.h>
+#include <asm/user.h>
+
 /* SH relocation types  */
 /* SH relocation types  */
 #define	R_SH_NONE		0
 #define	R_SH_NONE		0
 #define	R_SH_DIR32		1
 #define	R_SH_DIR32		1
@@ -46,9 +51,6 @@
  * ELF register definitions..
  * ELF register definitions..
  */
  */
 
 
-#include <asm/ptrace.h>
-#include <asm/user.h>
-
 typedef unsigned long elf_greg_t;
 typedef unsigned long elf_greg_t;
 
 
 #define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
 #define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
@@ -91,7 +93,7 @@ typedef struct user_fpu_struct elf_fpregset_t;
    instruction set this CPU supports.  This could be done in user space,
    instruction set this CPU supports.  This could be done in user space,
    but it's not easy, and we've already done it here.  */
    but it's not easy, and we've already done it here.  */
 
 
-#define ELF_HWCAP	(0)
+#define ELF_HWCAP	(boot_cpu_data.flags)
 
 
 /* This yields a string that ld.so will use to load implementation
 /* This yields a string that ld.so will use to load implementation
    specific libraries for optimization.  This is more specific in
    specific libraries for optimization.  This is more specific in

+ 1 - 11
include/asm-sh/processor.h

@@ -14,6 +14,7 @@
 #include <asm/types.h>
 #include <asm/types.h>
 #include <asm/cache.h>
 #include <asm/cache.h>
 #include <asm/ptrace.h>
 #include <asm/ptrace.h>
+#include <asm/cpu-features.h>
 
 
 /*
 /*
  * Default implementation of macro that returns current
  * Default implementation of macro that returns current
@@ -127,17 +128,6 @@ union sh_fpu_union {
 	struct sh_fpu_soft_struct soft;
 	struct sh_fpu_soft_struct soft;
 };
 };
 
 
-/*
- * Processor flags
- */
-
-#define CPU_HAS_FPU		0x0001	/* Hardware FPU support */
-#define CPU_HAS_P2_FLUSH_BUG	0x0002	/* Need to flush the cache in P2 area */
-#define CPU_HAS_MMU_PAGE_ASSOC	0x0004	/* SH3: TLB way selection bit support */
-#define CPU_HAS_DSP		0x0008	/* SH-DSP: DSP support */
-#define CPU_HAS_PERF_COUNTER	0x0010	/* Hardware performance counters */
-#define CPU_HAS_PTEA		0x0020	/* PTEA register */
-
 struct thread_struct {
 struct thread_struct {
 	unsigned long sp;
 	unsigned long sp;
 	unsigned long pc;
 	unsigned long pc;