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@@ -57,16 +57,6 @@
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* physically contiguous memory regions it is mapping into page sizes
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* that we support.
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*
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- * Traditionally the IOMMU core just handed us the mappings directly,
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- * after making sure the size is an order of a 4KiB page and that the
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- * mapping has natural alignment.
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- *
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- * To retain this behavior, we currently advertise that we support
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- * all page sizes that are an order of 4KiB.
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- *
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- * If at some point we'd like to utilize the IOMMU core's new behavior,
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- * we could change this to advertise the real page sizes we support.
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- *
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* 512GB Pages are not supported due to a hardware bug
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*/
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#define AMD_IOMMU_PGSIZES ((~0xFFFUL) & ~(2ULL << 38))
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