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@@ -159,7 +159,7 @@ void rs600_gart_tlb_flush(struct radeon_device *rdev)
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WREG32_MC(R_000100_MC_PT0_CNTL, tmp);
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WREG32_MC(R_000100_MC_PT0_CNTL, tmp);
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tmp = RREG32_MC(R_000100_MC_PT0_CNTL);
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tmp = RREG32_MC(R_000100_MC_PT0_CNTL);
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- tmp |= S_000100_INVALIDATE_ALL_L1_TLBS(1) & S_000100_INVALIDATE_L2_CACHE(1);
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+ tmp |= S_000100_INVALIDATE_ALL_L1_TLBS(1) | S_000100_INVALIDATE_L2_CACHE(1);
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WREG32_MC(R_000100_MC_PT0_CNTL, tmp);
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WREG32_MC(R_000100_MC_PT0_CNTL, tmp);
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tmp = RREG32_MC(R_000100_MC_PT0_CNTL);
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tmp = RREG32_MC(R_000100_MC_PT0_CNTL);
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