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Documentation: clk: Fix a trivial typo in audss

Fixes a trivial typo.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Sachin Kamat 12 years ago
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9ca1839776
commit
30abda170b
1 changed files with 1 additions and 1 deletions
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      Documentation/devicetree/bindings/clock/clk-exynos-audss.txt

+ 1 - 1
Documentation/devicetree/bindings/clock/clk-exynos-audss.txt
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@@ -2,7 +2,7 @@
 
 
 The Samsung Audio Subsystem clock controller generates and supplies clocks
 
 to Audio Subsystem block available in the S5PV210 and Exynos SoCs. The clock
 
-binding described here is applicable to all SoC's in Exynos family.
 
+binding described here is applicable to all SoCs in Exynos family.
 
 
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