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@@ -407,13 +407,14 @@ void omap_sram_idle(void)
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omap3_intc_prepare_idle();
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omap3_intc_prepare_idle();
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/*
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/*
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- * On EMU/HS devices ROM code restores a SRDC value
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- * from scratchpad which has automatic self refresh on timeout
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- * of AUTO_CNT = 1 enabled. This takes care of erratum ID i443.
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- * Hence store/restore the SDRC_POWER register here.
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- */
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- if (omap_rev() >= OMAP3430_REV_ES3_0 &&
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- omap_type() != OMAP2_DEVICE_TYPE_GP &&
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+ * On EMU/HS devices ROM code restores a SRDC value
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+ * from scratchpad which has automatic self refresh on timeout
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+ * of AUTO_CNT = 1 enabled. This takes care of erratum ID i443.
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+ * Hence store/restore the SDRC_POWER register here.
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+ */
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+ if (cpu_is_omap3430() && omap_rev() >= OMAP3430_REV_ES3_0 &&
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+ (omap_type() == OMAP2_DEVICE_TYPE_EMU ||
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+ omap_type() == OMAP2_DEVICE_TYPE_SEC) &&
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core_next_state == PWRDM_POWER_OFF)
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core_next_state == PWRDM_POWER_OFF)
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sdrc_pwr = sdrc_read_reg(SDRC_POWER);
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sdrc_pwr = sdrc_read_reg(SDRC_POWER);
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@@ -430,8 +431,9 @@ void omap_sram_idle(void)
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omap34xx_do_sram_idle(save_state);
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omap34xx_do_sram_idle(save_state);
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/* Restore normal SDRC POWER settings */
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/* Restore normal SDRC POWER settings */
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- if (omap_rev() >= OMAP3430_REV_ES3_0 &&
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- omap_type() != OMAP2_DEVICE_TYPE_GP &&
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+ if (cpu_is_omap3430() && omap_rev() >= OMAP3430_REV_ES3_0 &&
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+ (omap_type() == OMAP2_DEVICE_TYPE_EMU ||
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+ omap_type() == OMAP2_DEVICE_TYPE_SEC) &&
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core_next_state == PWRDM_POWER_OFF)
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core_next_state == PWRDM_POWER_OFF)
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sdrc_write_reg(sdrc_pwr, SDRC_POWER);
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sdrc_write_reg(sdrc_pwr, SDRC_POWER);
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