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@@ -36,7 +36,13 @@
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#define UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV 0x52
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#define UART_OMAP_WER 0x17 /* Wake-up enable register */
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-#define DEFAULT_TIMEOUT (5 * HZ)
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+/*
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+ * NOTE: By default the serial timeout is disabled as it causes lost characters
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+ * over the serial ports. This means that the UART clocks will stay on until
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+ * disabled via sysfs. This also causes that any deeper omap sleep states are
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+ * blocked.
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+ */
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+#define DEFAULT_TIMEOUT 0
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struct omap_uart_state {
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int num;
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@@ -422,7 +428,8 @@ static void omap_uart_idle_init(struct omap_uart_state *uart)
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uart->timeout = DEFAULT_TIMEOUT;
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setup_timer(&uart->timer, omap_uart_idle_timer,
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(unsigned long) uart);
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- mod_timer(&uart->timer, jiffies + uart->timeout);
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+ if (uart->timeout)
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+ mod_timer(&uart->timer, jiffies + uart->timeout);
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omap_uart_smart_idle_enable(uart, 0);
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if (cpu_is_omap34xx()) {
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