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@@ -408,6 +408,45 @@ static void b43_nphy_reset_cca(struct b43_wldev *dev)
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/* TODO: N PHY Force RF Seq with argument 2 */
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}
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+/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxIqEst */
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+static void b43_nphy_rx_iq_est(struct b43_wldev *dev, struct nphy_iq_est *est,
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+ u16 samps, u8 time, bool wait)
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+{
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+ int i;
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+ u16 tmp;
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+
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+ b43_phy_write(dev, B43_NPHY_IQEST_SAMCNT, samps);
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+ b43_phy_maskset(dev, B43_NPHY_IQEST_WT, ~B43_NPHY_IQEST_WT_VAL, time);
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+ if (wait)
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+ b43_phy_set(dev, B43_NPHY_IQEST_CMD, B43_NPHY_IQEST_CMD_MODE);
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+ else
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+ b43_phy_mask(dev, B43_NPHY_IQEST_CMD, ~B43_NPHY_IQEST_CMD_MODE);
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+
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+ b43_phy_set(dev, B43_NPHY_IQEST_CMD, B43_NPHY_IQEST_CMD_START);
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+
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+ for (i = 1000; i; i--) {
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+ tmp = b43_phy_read(dev, B43_NPHY_IQEST_CMD);
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+ if (!(tmp & B43_NPHY_IQEST_CMD_START)) {
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+ est->i0_pwr = (b43_phy_read(dev, B43_NPHY_IQEST_IPACC_HI0) << 16) |
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+ b43_phy_read(dev, B43_NPHY_IQEST_IPACC_LO0);
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+ est->q0_pwr = (b43_phy_read(dev, B43_NPHY_IQEST_QPACC_HI0) << 16) |
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+ b43_phy_read(dev, B43_NPHY_IQEST_QPACC_LO0);
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+ est->iq0_prod = (b43_phy_read(dev, B43_NPHY_IQEST_IQACC_HI0) << 16) |
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+ b43_phy_read(dev, B43_NPHY_IQEST_IQACC_LO0);
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+
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+ est->i1_pwr = (b43_phy_read(dev, B43_NPHY_IQEST_IPACC_HI1) << 16) |
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+ b43_phy_read(dev, B43_NPHY_IQEST_IPACC_LO1);
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+ est->q1_pwr = (b43_phy_read(dev, B43_NPHY_IQEST_QPACC_HI1) << 16) |
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+ b43_phy_read(dev, B43_NPHY_IQEST_QPACC_LO1);
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+ est->iq1_prod = (b43_phy_read(dev, B43_NPHY_IQEST_IQACC_HI1) << 16) |
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+ b43_phy_read(dev, B43_NPHY_IQEST_IQACC_LO1);
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+ return;
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+ }
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+ udelay(10);
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+ }
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+ memset(est, 0, sizeof(*est));
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+}
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+
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/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxIqCoeffs */
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static void b43_nphy_rx_iq_coeffs(struct b43_wldev *dev, bool write,
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struct b43_phy_n_iq_comp *pcomp)
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