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@@ -208,7 +208,7 @@ SMbuf* smt_get_mbuf(struct s_smc *smc);
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#if defined(NDIS_OS2) || defined(ODI2)
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#define CR_READ(var) ((var) & 0xffff0000 | ((var) & 0xffff))
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#else
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-#define CR_READ(var) (u_long)(var)
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+#define CR_READ(var) (__le32)(var)
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#endif
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#define IMASK_SLOW (IS_PLINT1 | IS_PLINT2 | IS_TIMINT | IS_TOKEN | \
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@@ -343,16 +343,16 @@ static u_long init_descr_ring(struct s_smc *smc,
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for (i=count-1, d1=start; i ; i--) {
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d2 = d1 ;
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d1++ ; /* descr is owned by the host */
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- d2->r.rxd_rbctrl = AIX_REVERSE(BMU_CHECK) ;
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+ d2->r.rxd_rbctrl = cpu_to_le32(BMU_CHECK) ;
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d2->r.rxd_next = &d1->r ;
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phys = mac_drv_virt2phys(smc,(void *)d1) ;
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- d2->r.rxd_nrdadr = AIX_REVERSE(phys) ;
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+ d2->r.rxd_nrdadr = cpu_to_le32(phys) ;
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}
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DB_GEN("descr ring ends at = %x ",(void *)d1,0,3) ;
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- d1->r.rxd_rbctrl = AIX_REVERSE(BMU_CHECK) ;
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+ d1->r.rxd_rbctrl = cpu_to_le32(BMU_CHECK) ;
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d1->r.rxd_next = &start->r ;
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phys = mac_drv_virt2phys(smc,(void *)start) ;
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- d1->r.rxd_nrdadr = AIX_REVERSE(phys) ;
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+ d1->r.rxd_nrdadr = cpu_to_le32(phys) ;
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for (i=count, d1=start; i ; i--) {
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DRV_BUF_FLUSH(&d1->r,DDI_DMA_SYNC_FORDEV) ;
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@@ -376,7 +376,7 @@ static void init_txd_ring(struct s_smc *smc)
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DB_GEN("Init async TxD ring, %d TxDs ",HWM_ASYNC_TXD_COUNT,0,3) ;
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(void)init_descr_ring(smc,(union s_fp_descr volatile *)ds,
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HWM_ASYNC_TXD_COUNT) ;
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- phys = AIX_REVERSE(ds->txd_ntdadr) ;
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+ phys = le32_to_cpu(ds->txd_ntdadr) ;
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ds++ ;
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queue->tx_curr_put = queue->tx_curr_get = ds ;
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ds-- ;
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@@ -390,7 +390,7 @@ static void init_txd_ring(struct s_smc *smc)
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DB_GEN("Init sync TxD ring, %d TxDs ",HWM_SYNC_TXD_COUNT,0,3) ;
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(void)init_descr_ring(smc,(union s_fp_descr volatile *)ds,
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HWM_SYNC_TXD_COUNT) ;
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- phys = AIX_REVERSE(ds->txd_ntdadr) ;
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+ phys = le32_to_cpu(ds->txd_ntdadr) ;
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ds++ ;
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queue->tx_curr_put = queue->tx_curr_get = ds ;
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queue->tx_free = HWM_SYNC_TXD_COUNT ;
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@@ -412,7 +412,7 @@ static void init_rxd_ring(struct s_smc *smc)
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DB_GEN("Init RxD ring, %d RxDs ",SMT_R1_RXD_COUNT,0,3) ;
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(void)init_descr_ring(smc,(union s_fp_descr volatile *)ds,
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SMT_R1_RXD_COUNT) ;
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- phys = AIX_REVERSE(ds->rxd_nrdadr) ;
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+ phys = le32_to_cpu(ds->rxd_nrdadr) ;
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ds++ ;
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queue->rx_curr_put = queue->rx_curr_get = ds ;
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queue->rx_free = SMT_R1_RXD_COUNT ;
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@@ -607,12 +607,12 @@ static u_long repair_txd_ring(struct s_smc *smc, struct s_smt_tx_queue *queue)
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for (i = tx_used+queue->tx_free-1 ; i ; i-- ) {
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t = t->txd_next ;
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}
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- phys = AIX_REVERSE(t->txd_ntdadr) ;
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+ phys = le32_to_cpu(t->txd_ntdadr) ;
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t = queue->tx_curr_get ;
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while (tx_used) {
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DRV_BUF_FLUSH(t,DDI_DMA_SYNC_FORCPU) ;
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- tbctrl = AIX_REVERSE(t->txd_tbctrl) ;
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+ tbctrl = le32_to_cpu(t->txd_tbctrl) ;
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if (tbctrl & BMU_OWN) {
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if (tbctrl & BMU_STF) {
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@@ -622,10 +622,10 @@ static u_long repair_txd_ring(struct s_smc *smc, struct s_smt_tx_queue *queue)
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/*
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* repair the descriptor
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*/
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- t->txd_tbctrl &= AIX_REVERSE(~BMU_OWN) ;
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+ t->txd_tbctrl &= ~cpu_to_le32(BMU_OWN) ;
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}
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}
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- phys = AIX_REVERSE(t->txd_ntdadr) ;
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+ phys = le32_to_cpu(t->txd_ntdadr) ;
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DRV_BUF_FLUSH(t,DDI_DMA_SYNC_FORDEV) ;
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t = t->txd_next ;
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tx_used-- ;
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@@ -659,12 +659,12 @@ static u_long repair_rxd_ring(struct s_smc *smc, struct s_smt_rx_queue *queue)
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for (i = SMT_R1_RXD_COUNT-1 ; i ; i-- ) {
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r = r->rxd_next ;
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}
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- phys = AIX_REVERSE(r->rxd_nrdadr) ;
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+ phys = le32_to_cpu(r->rxd_nrdadr) ;
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r = queue->rx_curr_get ;
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while (rx_used) {
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DRV_BUF_FLUSH(r,DDI_DMA_SYNC_FORCPU) ;
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- rbctrl = AIX_REVERSE(r->rxd_rbctrl) ;
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+ rbctrl = le32_to_cpu(r->rxd_rbctrl) ;
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if (rbctrl & BMU_OWN) {
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if (rbctrl & BMU_STF) {
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@@ -674,10 +674,10 @@ static u_long repair_rxd_ring(struct s_smc *smc, struct s_smt_rx_queue *queue)
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/*
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* repair the descriptor
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*/
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- r->rxd_rbctrl &= AIX_REVERSE(~BMU_OWN) ;
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+ r->rxd_rbctrl &= ~cpu_to_le32(BMU_OWN) ;
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}
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}
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- phys = AIX_REVERSE(r->rxd_nrdadr) ;
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+ phys = le32_to_cpu(r->rxd_nrdadr) ;
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DRV_BUF_FLUSH(r,DDI_DMA_SYNC_FORDEV) ;
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r = r->rxd_next ;
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rx_used-- ;
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@@ -1094,8 +1094,7 @@ void process_receive(struct s_smc *smc)
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do {
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DB_RX("Check RxD %x for OWN and EOF",(void *)r,0,5) ;
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DRV_BUF_FLUSH(r,DDI_DMA_SYNC_FORCPU) ;
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- rbctrl = CR_READ(r->rxd_rbctrl) ;
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- rbctrl = AIX_REVERSE(rbctrl) ;
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+ rbctrl = le32_to_cpu(CR_READ(r->rxd_rbctrl));
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if (rbctrl & BMU_OWN) {
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NDD_TRACE("RHxE",r,rfsw,rbctrl) ;
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@@ -1118,7 +1117,7 @@ void process_receive(struct s_smc *smc)
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smc->os.hwm.detec_count = 0 ;
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goto rx_end ;
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}
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- rfsw = AIX_REVERSE(r->rxd_rfsw) ;
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+ rfsw = le32_to_cpu(r->rxd_rfsw) ;
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if ((rbctrl & BMU_STF) != ((rbctrl & BMU_ST_BUF) <<5)) {
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/*
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* The BMU_STF bit is deleted, 1 frame is
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@@ -1151,7 +1150,7 @@ void process_receive(struct s_smc *smc)
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/* may be next 2 DRV_BUF_FLUSH() can be skipped, because */
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/* BMU_ST_BUF will not be changed by the ASIC */
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DRV_BUF_FLUSH(r,DDI_DMA_SYNC_FORCPU) ;
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- while (rx_used && !(r->rxd_rbctrl & AIX_REVERSE(BMU_ST_BUF))) {
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+ while (rx_used && !(r->rxd_rbctrl & cpu_to_le32(BMU_ST_BUF))) {
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DB_RX("Check STF bit in %x",(void *)r,0,5) ;
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r = r->rxd_next ;
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DRV_BUF_FLUSH(r,DDI_DMA_SYNC_FORCPU) ;
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@@ -1171,7 +1170,7 @@ void process_receive(struct s_smc *smc)
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/*
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* ASIC Errata no. 7 (STF - Bit Bug)
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*/
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- rxd->rxd_rbctrl &= AIX_REVERSE(~BMU_STF) ;
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+ rxd->rxd_rbctrl &= cpu_to_le32(~BMU_STF) ;
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for (r=rxd, i=frag_count ; i ; r=r->rxd_next, i--){
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DB_RX("dma_complete for RxD %x",(void *)r,0,5) ;
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@@ -1287,7 +1286,7 @@ void process_receive(struct s_smc *smc)
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hwm_cpy_rxd2mb(rxd,data,len) ;
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#else
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for (r=rxd, i=used_frags ; i ; r=r->rxd_next, i--){
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- n = AIX_REVERSE(r->rxd_rbctrl) & RD_LENGTH ;
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+ n = le32_to_cpu(r->rxd_rbctrl) & RD_LENGTH ;
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DB_RX("cp SMT frame to mb: len = %d",n,0,6) ;
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memcpy(data,r->rxd_virt,n) ;
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data += n ;
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@@ -1426,14 +1425,14 @@ void hwm_rx_frag(struct s_smc *smc, char far *virt, u_long phys, int len,
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int frame_status)
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{
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struct s_smt_fp_rxd volatile *r ;
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- u_int rbctrl ;
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+ __le32 rbctrl;
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NDD_TRACE("RHfB",virt,len,frame_status) ;
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DB_RX("hwm_rx_frag: len = %d, frame_status = %x\n",len,frame_status,2) ;
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r = smc->hw.fp.rx_q[QUEUE_R1].rx_curr_put ;
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r->rxd_virt = virt ;
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- r->rxd_rbadr = AIX_REVERSE(phys) ;
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- rbctrl = AIX_REVERSE( (((u_long)frame_status &
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+ r->rxd_rbadr = cpu_to_le32(phys) ;
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+ rbctrl = cpu_to_le32( (((__u32)frame_status &
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(FIRST_FRAG|LAST_FRAG))<<26) |
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(((u_long) frame_status & FIRST_FRAG) << 21) |
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BMU_OWN | BMU_CHECK | BMU_EN_IRQ_EOF | len) ;
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@@ -1444,7 +1443,7 @@ void hwm_rx_frag(struct s_smc *smc, char far *virt, u_long phys, int len,
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smc->hw.fp.rx_q[QUEUE_R1].rx_free-- ;
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smc->hw.fp.rx_q[QUEUE_R1].rx_used++ ;
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smc->hw.fp.rx_q[QUEUE_R1].rx_curr_put = r->rxd_next ;
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- NDD_TRACE("RHfE",r,AIX_REVERSE(r->rxd_rbadr),0) ;
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+ NDD_TRACE("RHfE",r,le32_to_cpu(r->rxd_rbadr),0) ;
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}
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/*
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@@ -1494,15 +1493,15 @@ void mac_drv_clear_rx_queue(struct s_smc *smc)
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while (queue->rx_used) {
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DRV_BUF_FLUSH(r,DDI_DMA_SYNC_FORCPU) ;
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DB_RX("switch OWN bit of RxD 0x%x ",r,0,5) ;
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- r->rxd_rbctrl &= AIX_REVERSE(~BMU_OWN) ;
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+ r->rxd_rbctrl &= ~cpu_to_le32(BMU_OWN) ;
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frag_count = 1 ;
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DRV_BUF_FLUSH(r,DDI_DMA_SYNC_FORDEV) ;
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r = r->rxd_next ;
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DRV_BUF_FLUSH(r,DDI_DMA_SYNC_FORCPU) ;
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while (r != queue->rx_curr_put &&
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- !(r->rxd_rbctrl & AIX_REVERSE(BMU_ST_BUF))) {
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+ !(r->rxd_rbctrl & cpu_to_le32(BMU_ST_BUF))) {
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DB_RX("Check STF bit in %x",(void *)r,0,5) ;
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- r->rxd_rbctrl &= AIX_REVERSE(~BMU_OWN) ;
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+ r->rxd_rbctrl &= ~cpu_to_le32(BMU_OWN) ;
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DRV_BUF_FLUSH(r,DDI_DMA_SYNC_FORDEV) ;
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r = r->rxd_next ;
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DRV_BUF_FLUSH(r,DDI_DMA_SYNC_FORCPU) ;
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@@ -1640,7 +1639,7 @@ void hwm_tx_frag(struct s_smc *smc, char far *virt, u_long phys, int len,
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{
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struct s_smt_fp_txd volatile *t ;
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struct s_smt_tx_queue *queue ;
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- u_int tbctrl ;
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+ __le32 tbctrl ;
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queue = smc->os.hwm.tx_p ;
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@@ -1657,9 +1656,9 @@ void hwm_tx_frag(struct s_smc *smc, char far *virt, u_long phys, int len,
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/* '*t' is already defined */
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DB_TX("LAN_TX: TxD = %x, virt = %x ",t,virt,3) ;
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t->txd_virt = virt ;
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- t->txd_txdscr = AIX_REVERSE(smc->os.hwm.tx_descr) ;
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- t->txd_tbadr = AIX_REVERSE(phys) ;
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- tbctrl = AIX_REVERSE((((u_long)frame_status &
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+ t->txd_txdscr = cpu_to_le32(smc->os.hwm.tx_descr) ;
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+ t->txd_tbadr = cpu_to_le32(phys) ;
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+ tbctrl = cpu_to_le32((((__u32)frame_status &
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(FIRST_FRAG|LAST_FRAG|EN_IRQ_EOF))<< 26) |
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BMU_OWN|BMU_CHECK |len) ;
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t->txd_tbctrl = tbctrl ;
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@@ -1826,7 +1825,7 @@ void smt_send_mbuf(struct s_smc *smc, SMbuf *mb, int fc)
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struct s_smt_tx_queue *queue ;
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struct s_smt_fp_txd volatile *t ;
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u_long phys ;
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- u_int tbctrl ;
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+ __le32 tbctrl;
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NDD_TRACE("THSB",mb,fc,0) ;
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DB_TX("smt_send_mbuf: mb = 0x%x, fc = 0x%x",mb,fc,4) ;
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@@ -1894,14 +1893,14 @@ void smt_send_mbuf(struct s_smc *smc, SMbuf *mb, int fc)
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DB_TX("init TxD = 0x%x",(void *)t,0,5) ;
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if (i == frag_count-1) {
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frame_status |= LAST_FRAG ;
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- t->txd_txdscr = AIX_REVERSE(TX_DESCRIPTOR |
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- (((u_long)(mb->sm_len-1)&3) << 27)) ;
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+ t->txd_txdscr = cpu_to_le32(TX_DESCRIPTOR |
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+ (((__u32)(mb->sm_len-1)&3) << 27)) ;
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}
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t->txd_virt = virt[i] ;
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phys = dma_master(smc, (void far *)virt[i],
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frag_len[i], DMA_RD|SMT_BUF) ;
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- t->txd_tbadr = AIX_REVERSE(phys) ;
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- tbctrl = AIX_REVERSE((((u_long) frame_status &
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+ t->txd_tbadr = cpu_to_le32(phys) ;
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+ tbctrl = cpu_to_le32((((__u32)frame_status &
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(FIRST_FRAG|LAST_FRAG)) << 26) |
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BMU_OWN | BMU_CHECK | BMU_SMT_TX |frag_len[i]) ;
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t->txd_tbctrl = tbctrl ;
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@@ -1971,8 +1970,7 @@ static void mac_drv_clear_txd(struct s_smc *smc)
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do {
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DRV_BUF_FLUSH(t1,DDI_DMA_SYNC_FORCPU) ;
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DB_TX("check OWN/EOF bit of TxD 0x%x",t1,0,5) ;
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- tbctrl = CR_READ(t1->txd_tbctrl) ;
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- tbctrl = AIX_REVERSE(tbctrl) ;
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+ tbctrl = le32_to_cpu(CR_READ(t1->txd_tbctrl));
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if (tbctrl & BMU_OWN || !queue->tx_used){
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DB_TX("End of TxDs queue %d",i,0,4) ;
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@@ -1984,7 +1982,7 @@ static void mac_drv_clear_txd(struct s_smc *smc)
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t1 = queue->tx_curr_get ;
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for (n = frag_count; n; n--) {
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- tbctrl = AIX_REVERSE(t1->txd_tbctrl) ;
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+ tbctrl = le32_to_cpu(t1->txd_tbctrl) ;
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dma_complete(smc,
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(union s_fp_descr volatile *) t1,
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(int) (DMA_RD |
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@@ -2064,7 +2062,7 @@ void mac_drv_clear_tx_queue(struct s_smc *smc)
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while (tx_used) {
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DRV_BUF_FLUSH(t,DDI_DMA_SYNC_FORCPU) ;
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DB_TX("switch OWN bit of TxD 0x%x ",t,0,5) ;
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- t->txd_tbctrl &= AIX_REVERSE(~BMU_OWN) ;
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+ t->txd_tbctrl &= ~cpu_to_le32(BMU_OWN) ;
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DRV_BUF_FLUSH(t,DDI_DMA_SYNC_FORDEV) ;
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t = t->txd_next ;
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tx_used-- ;
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@@ -2086,10 +2084,10 @@ void mac_drv_clear_tx_queue(struct s_smc *smc)
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* tx_curr_get and tx_curr_put to this position
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*/
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if (i == QUEUE_S) {
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- outpd(ADDR(B5_XS_DA),AIX_REVERSE(t->txd_ntdadr)) ;
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+ outpd(ADDR(B5_XS_DA),le32_to_cpu(t->txd_ntdadr)) ;
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}
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else {
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- outpd(ADDR(B5_XA_DA),AIX_REVERSE(t->txd_ntdadr)) ;
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+ outpd(ADDR(B5_XA_DA),le32_to_cpu(t->txd_ntdadr)) ;
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}
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queue->tx_curr_put = queue->tx_curr_get->txd_next ;
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