Browse Source

drm/radeon: Handle PPLL0 powerdown on DCE8

Only Bonaire has PPLL0.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher 12 years ago
parent
commit
2f0047b2ba
1 changed files with 1 additions and 1 deletions
  1. 1 1
      drivers/gpu/drm/radeon/atombios_crtc.c

+ 1 - 1
drivers/gpu/drm/radeon/atombios_crtc.c

@@ -1931,7 +1931,7 @@ static void atombios_crtc_disable(struct drm_crtc *crtc)
 		break;
 	case ATOM_PPLL0:
 		/* disable the ppll */
-		if (ASIC_IS_DCE61(rdev))
+		if ((rdev->family == CHIP_ARUBA) || (rdev->family == CHIP_BONAIRE))
 			atombios_crtc_program_pll(crtc, radeon_crtc->crtc_id, radeon_crtc->pll_id,
 						  0, 0, ATOM_DISABLE, 0, 0, 0, 0, 0, false, &ss);
 		break;