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@@ -36,14 +36,14 @@
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************************************************************************/
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struct cls_uart_struct {
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- volatile uchar txrx; /* WR RHR/THR - Holding Reg */
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- volatile uchar ier; /* WR IER - Interrupt Enable Reg */
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- volatile uchar isr_fcr; /* WR ISR/FCR - Interrupt Status Reg/Fifo Control Reg */
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- volatile uchar lcr; /* WR LCR - Line Control Reg */
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- volatile uchar mcr; /* WR MCR - Modem Control Reg */
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- volatile uchar lsr; /* WR LSR - Line Status Reg */
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- volatile uchar msr; /* WR MSR - Modem Status Reg */
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- volatile uchar spr; /* WR SPR - Scratch Pad Reg */
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+ u8 txrx; /* WR RHR/THR - Holding Reg */
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+ u8 ier; /* WR IER - Interrupt Enable Reg */
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+ u8 isr_fcr; /* WR ISR/FCR - Interrupt Status Reg/Fifo Control Reg */
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+ u8 lcr; /* WR LCR - Line Control Reg */
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+ u8 mcr; /* WR MCR - Modem Control Reg */
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+ u8 lsr; /* WR LSR - Line Status Reg */
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+ u8 msr; /* WR MSR - Modem Status Reg */
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+ u8 spr; /* WR SPR - Scratch Pad Reg */
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};
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/* Where to read the interrupt register (8bits) */
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