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@@ -928,7 +928,7 @@ ai_buscore_setup(struct si_info *sii, u32 savewin, uint *origidx)
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/* get chipcommon chipstatus */
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if (sii->pub.ccrev >= 11)
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- sii->pub.chipst = R_REG(&cc->chipstatus);
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+ sii->chipst = R_REG(&cc->chipstatus);
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/* get chipcommon capabilites */
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sii->pub.cccaps = R_REG(&cc->capabilities);
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@@ -942,7 +942,7 @@ ai_buscore_setup(struct si_info *sii, u32 savewin, uint *origidx)
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/* figure out bus/orignal core idx */
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sii->pub.buscoretype = NODEV_CORE_ID;
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sii->pub.buscorerev = NOREV;
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- sii->pub.buscoreidx = BADIDX;
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+ sii->buscoreidx = BADIDX;
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pci = pcie = false;
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pcirev = pcierev = NOREV;
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@@ -980,11 +980,11 @@ ai_buscore_setup(struct si_info *sii, u32 savewin, uint *origidx)
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if (pci) {
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sii->pub.buscoretype = PCI_CORE_ID;
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sii->pub.buscorerev = pcirev;
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- sii->pub.buscoreidx = pciidx;
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+ sii->buscoreidx = pciidx;
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} else if (pcie) {
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sii->pub.buscoretype = PCIE_CORE_ID;
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sii->pub.buscorerev = pcierev;
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- sii->pub.buscoreidx = pcieidx;
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+ sii->buscoreidx = pcieidx;
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}
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/* fixup necessary chip/core configurations */
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@@ -1034,7 +1034,7 @@ static struct si_info *ai_doattach(struct si_info *sii,
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savewin = 0;
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- sih->buscoreidx = BADIDX;
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+ sii->buscoreidx = BADIDX;
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sii->curmap = regs;
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sii->pbus = pbus;
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@@ -1372,7 +1372,7 @@ uint ai_corereg(struct si_pub *sih, uint coreidx, uint regoff, uint mask,
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fast = true;
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r = (u32 __iomem *)((__iomem char *)sii->curmap +
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PCI_16KB0_CCREGS_OFFSET + regoff);
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- } else if (sii->pub.buscoreidx == coreidx) {
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+ } else if (sii->buscoreidx == coreidx) {
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/*
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* pci registers are at either in the last 2KB of
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* an 8KB window or, in pcie and pci rev 13 at 8KB
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@@ -1904,7 +1904,7 @@ void ai_pci_setup(struct si_pub *sih, uint coremask)
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siflag = ai_flag(sih);
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/* switch over to pci core */
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- regs = ai_setcoreidx(sih, sii->pub.buscoreidx);
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+ regs = ai_setcoreidx(sih, sii->buscoreidx);
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}
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/*
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@@ -2035,8 +2035,9 @@ bool ai_deviceremoved(struct si_pub *sih)
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bool ai_is_sprom_available(struct si_pub *sih)
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{
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+ struct si_info *sii = (struct si_info *)sih;
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+
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if (sih->ccrev >= 31) {
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- struct si_info *sii;
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uint origidx;
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struct chipcregs __iomem *cc;
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u32 sromctrl;
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@@ -2044,7 +2045,6 @@ bool ai_is_sprom_available(struct si_pub *sih)
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if ((sih->cccaps & CC_CAP_SROM) == 0)
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return false;
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- sii = (struct si_info *)sih;
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origidx = sii->curidx;
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cc = ai_setcoreidx(sih, SI_CC_IDX);
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sromctrl = R_REG(&cc->sromcontrol);
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@@ -2054,7 +2054,7 @@ bool ai_is_sprom_available(struct si_pub *sih)
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switch (sih->chip) {
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case BCM4313_CHIP_ID:
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- return (sih->chipst & CST4313_SPROM_PRESENT) != 0;
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+ return (sii->chipst & CST4313_SPROM_PRESENT) != 0;
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default:
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return true;
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}
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@@ -2062,9 +2062,11 @@ bool ai_is_sprom_available(struct si_pub *sih)
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bool ai_is_otp_disabled(struct si_pub *sih)
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{
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+ struct si_info *sii = (struct si_info *)sih;
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+
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switch (sih->chip) {
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case BCM4313_CHIP_ID:
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- return (sih->chipst & CST4313_OTP_PRESENT) == 0;
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+ return (sii->chipst & CST4313_OTP_PRESENT) == 0;
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/* These chips always have their OTP on */
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case BCM43224_CHIP_ID:
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case BCM43225_CHIP_ID:
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