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@@ -156,8 +156,8 @@ enum mac_version {
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RTL_GIGA_MAC_VER_03 = 0x02,
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RTL_GIGA_MAC_VER_04 = 0x03,
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RTL_GIGA_MAC_VER_05 = 0x04,
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- RTL_GIGA_MAC_VER_11 = 0x0b,
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- RTL_GIGA_MAC_VER_12 = 0x0c,
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+ RTL_GIGA_MAC_VER_11 = 0x0b, // 8168Bb
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+ RTL_GIGA_MAC_VER_12 = 0x0c, // 8168Be 8168Bf
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RTL_GIGA_MAC_VER_13 = 0x0d,
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RTL_GIGA_MAC_VER_14 = 0x0e,
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RTL_GIGA_MAC_VER_15 = 0x0f
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@@ -1969,7 +1969,35 @@ static void rtl_hw_start_8169(struct net_device *dev)
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static void rtl_hw_start_8168(struct net_device *dev)
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{
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- rtl_hw_start_8169(dev);
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+ struct rtl8169_private *tp = netdev_priv(dev);
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+ void __iomem *ioaddr = tp->mmio_addr;
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+
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+ RTL_W8(Cfg9346, Cfg9346_Unlock);
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+
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+ RTL_W8(EarlyTxThres, EarlyTxThld);
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+
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+ rtl_set_rx_max_size(ioaddr);
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+
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+ tp->cp_cmd |= rtl_rw_cpluscmd(ioaddr) | PCIMulRW;
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+
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+ RTL_W16(CPlusCmd, tp->cp_cmd);
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+
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+ RTL_W16(IntrMitigate, 0x0000);
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+
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+ rtl_set_rx_tx_desc_registers(tp, ioaddr);
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+
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+ RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
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+ rtl_set_rx_tx_config_registers(tp);
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+
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+ RTL_W8(Cfg9346, Cfg9346_Lock);
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+
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+ RTL_R8(IntrMask);
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+
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+ RTL_W32(RxMissed, 0);
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+
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+ rtl_set_rx_mode(dev);
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+
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+ RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
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}
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static void rtl_hw_start_8101(struct net_device *dev)
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