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+/* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
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+ *
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+ * Copyright 2011 Wolfson Microelectronics plc
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+ * Mark Brown <broonie@opensource.wolfsonmicro.com>
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+ *
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+ * Copyright 2011 Simtec Electronics
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+ * Ben Dooks <ben@simtec.co.uk>
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/list.h>
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+#include <linux/serial_core.h>
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+#include <linux/platform_device.h>
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+#include <linux/fb.h>
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+#include <linux/io.h>
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+#include <linux/init.h>
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+#include <linux/gpio.h>
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+#include <linux/delay.h>
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+#include <linux/regulator/machine.h>
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+#include <linux/regulator/fixed.h>
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+#include <linux/pwm_backlight.h>
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+#include <linux/dm9000.h>
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+#include <linux/gpio_keys.h>
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+#include <linux/basic_mmio_gpio.h>
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+#include <linux/spi/spi.h>
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+
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+#include <linux/i2c/pca953x.h>
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+
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+#include <video/platform_lcd.h>
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+
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+#include <linux/mfd/wm831x/core.h>
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+#include <linux/mfd/wm831x/pdata.h>
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+#include <linux/mfd/wm831x/irq.h>
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+#include <linux/mfd/wm831x/gpio.h>
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+
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+#include <asm/mach/arch.h>
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+#include <asm/mach-types.h>
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+
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+#include <mach/hardware.h>
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+#include <mach/map.h>
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+
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+#include <mach/s3c6410.h>
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+#include <mach/regs-sys.h>
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+#include <mach/regs-gpio.h>
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+#include <mach/regs-modem.h>
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+
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+#include <mach/regs-gpio-memport.h>
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+
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+#include <plat/regs-serial.h>
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+#include <plat/regs-fb-v4.h>
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+#include <plat/fb.h>
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+#include <plat/sdhci.h>
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+#include <plat/gpio-cfg.h>
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+#include <plat/s3c64xx-spi.h>
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+
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+#include <plat/keypad.h>
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+#include <plat/clock.h>
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+#include <plat/devs.h>
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+#include <plat/cpu.h>
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+#include <plat/adc.h>
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+#include <plat/iic.h>
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+#include <plat/pm.h>
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+
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+#include <sound/wm8915.h>
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+#include <sound/wm8962.h>
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+#include <sound/wm9081.h>
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+
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+#define BANFF_PMIC_IRQ_BASE IRQ_BOARD_START
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+#define GLENFARCLAS_PMIC_IRQ_BASE (IRQ_BOARD_START + 64)
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+
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+#define PCA935X_GPIO_BASE GPIO_BOARD_START
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+#define CODEC_GPIO_BASE (GPIO_BOARD_START + 8)
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+#define GLENFARCLAS_PMIC_GPIO_BASE (GPIO_BOARD_START + 16)
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+
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+/* serial port setup */
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+
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+#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
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+#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
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+#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
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+
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+static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
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+ [0] = {
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+ .hwport = 0,
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+ .flags = 0,
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+ .ucon = UCON,
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+ .ulcon = ULCON,
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+ .ufcon = UFCON,
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+ },
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+ [1] = {
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+ .hwport = 1,
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+ .flags = 0,
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+ .ucon = UCON,
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+ .ulcon = ULCON,
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+ .ufcon = UFCON,
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+ },
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+ [2] = {
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+ .hwport = 2,
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+ .flags = 0,
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+ .ucon = UCON,
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+ .ulcon = ULCON,
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+ .ufcon = UFCON,
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+ },
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+ [3] = {
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+ .hwport = 3,
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+ .flags = 0,
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+ .ucon = UCON,
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+ .ulcon = ULCON,
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+ .ufcon = UFCON,
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+ },
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+};
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+
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+static struct platform_pwm_backlight_data crag6410_backlight_data = {
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+ .pwm_id = 0,
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+ .max_brightness = 1000,
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+ .dft_brightness = 600,
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+ .pwm_period_ns = 100000, /* about 1kHz */
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+};
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+
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+static struct platform_device crag6410_backlight_device = {
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+ .name = "pwm-backlight",
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+ .id = -1,
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+ .dev = {
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+ .parent = &s3c_device_timer[0].dev,
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+ .platform_data = &crag6410_backlight_data,
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+ },
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+};
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+
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+static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
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+{
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+ pr_debug("%s: setting power %d\n", __func__, power);
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+
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+ if (power) {
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+ gpio_set_value(S3C64XX_GPB(0), 1);
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+ msleep(1);
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+ s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
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+ } else {
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+ gpio_direction_output(S3C64XX_GPF(14), 0);
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+ gpio_set_value(S3C64XX_GPB(0), 0);
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+ }
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+}
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+
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+static struct platform_device crag6410_lcd_powerdev = {
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+ .name = "platform-lcd",
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+ .id = -1,
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+ .dev.parent = &s3c_device_fb.dev,
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+ .dev.platform_data = &(struct plat_lcd_data) {
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+ .set_power = crag6410_lcd_power_set,
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+ },
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+};
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+
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+/* 640x480 URT */
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+static struct s3c_fb_pd_win crag6410_fb_win0 = {
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+ /* this is to ensure we use win0 */
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+ .win_mode = {
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+ .left_margin = 150,
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+ .right_margin = 80,
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+ .upper_margin = 40,
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+ .lower_margin = 5,
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+ .hsync_len = 40,
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+ .vsync_len = 5,
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+ .xres = 640,
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+ .yres = 480,
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+ },
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+ .max_bpp = 32,
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+ .default_bpp = 16,
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+ .virtual_y = 480 * 2,
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+ .virtual_x = 640,
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+};
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+
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+/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
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+static struct s3c_fb_platdata crag6410_lcd_pdata __initdata = {
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+ .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
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+ .win[0] = &crag6410_fb_win0,
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+ .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
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+ .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
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+};
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+
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+/* 2x6 keypad */
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+
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+static uint32_t crag6410_keymap[] __initdata = {
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+ /* KEY(row, col, keycode) */
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+ KEY(0, 0, KEY_VOLUMEUP),
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+ KEY(0, 1, KEY_HOME),
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+ KEY(0, 2, KEY_VOLUMEDOWN),
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+ KEY(0, 3, KEY_HELP),
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+ KEY(0, 4, KEY_MENU),
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+ KEY(0, 5, KEY_MEDIA),
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+ KEY(1, 0, 232),
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+ KEY(1, 1, KEY_DOWN),
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+ KEY(1, 2, KEY_LEFT),
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+ KEY(1, 3, KEY_UP),
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+ KEY(1, 4, KEY_RIGHT),
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+ KEY(1, 5, KEY_CAMERA),
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+};
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+
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+static struct matrix_keymap_data crag6410_keymap_data __initdata = {
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+ .keymap = crag6410_keymap,
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+ .keymap_size = ARRAY_SIZE(crag6410_keymap),
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+};
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+
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+static struct samsung_keypad_platdata crag6410_keypad_data __initdata = {
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+ .keymap_data = &crag6410_keymap_data,
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+ .rows = 2,
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+ .cols = 6,
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+};
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+
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+static struct gpio_keys_button crag6410_gpio_keys[] = {
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+ [0] = {
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+ .code = KEY_SUSPEND,
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+ .gpio = S3C64XX_GPL(10), /* EINT 18 */
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+ .type = EV_KEY,
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+ .wakeup = 1,
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+ .active_low = 1,
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+ },
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+ [1] = {
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+ .code = SW_FRONT_PROXIMITY,
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+ .gpio = S3C64XX_GPN(11), /* EINT 11 */
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+ .type = EV_SW,
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+ },
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+};
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+
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+static struct gpio_keys_platform_data crag6410_gpio_keydata = {
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+ .buttons = crag6410_gpio_keys,
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+ .nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
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+};
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+
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+static struct platform_device crag6410_gpio_keydev = {
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+ .name = "gpio-keys",
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+ .id = 0,
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+ .dev.platform_data = &crag6410_gpio_keydata,
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+};
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+
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+static struct resource crag6410_dm9k_resource[] = {
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+ [0] = {
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+ .start = S3C64XX_PA_XM0CSN5,
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+ .end = S3C64XX_PA_XM0CSN5 + 1,
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+ .flags = IORESOURCE_MEM,
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+ },
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+ [1] = {
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+ .start = S3C64XX_PA_XM0CSN5 + (1 << 8),
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+ .end = S3C64XX_PA_XM0CSN5 + (1 << 8) + 1,
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+ .flags = IORESOURCE_MEM,
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+ },
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+ [2] = {
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+ .start = S3C_EINT(17),
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+ .end = S3C_EINT(17),
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+ .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
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+ },
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+};
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+
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+static struct dm9000_plat_data mini6410_dm9k_pdata = {
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+ .flags = DM9000_PLATF_16BITONLY,
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+};
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+
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+static struct platform_device crag6410_dm9k_device = {
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+ .name = "dm9000",
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+ .id = -1,
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+ .num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
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+ .resource = crag6410_dm9k_resource,
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+ .dev.platform_data = &mini6410_dm9k_pdata,
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+};
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+
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+static struct resource crag6410_mmgpio_resource[] = {
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+ [0] = {
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+ .start = S3C64XX_PA_XM0CSN4 + 1,
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+ .end = S3C64XX_PA_XM0CSN4 + 1,
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+ .flags = IORESOURCE_MEM,
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+ },
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+};
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+
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+static struct platform_device crag6410_mmgpio = {
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+ .name = "basic-mmio-gpio",
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+ .id = -1,
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+ .resource = crag6410_mmgpio_resource,
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+ .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
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+ .dev.platform_data = &(struct bgpio_pdata) {
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+ .base = -1,
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+ },
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+};
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+
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+static struct platform_device speyside_device = {
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+ .name = "speyside",
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+ .id = -1,
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+};
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+
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+static struct platform_device speyside_wm8962_device = {
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+ .name = "speyside-wm8962",
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+ .id = -1,
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+};
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+
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+static struct regulator_consumer_supply wallvdd_consumers[] = {
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+ REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
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+ REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
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+};
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+
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+static struct regulator_init_data wallvdd_data = {
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+ .constraints = {
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+ .always_on = 1,
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+ },
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+ .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
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+ .consumer_supplies = wallvdd_consumers,
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+};
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+
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+static struct fixed_voltage_config wallvdd_pdata = {
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+ .supply_name = "WALLVDD",
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+ .microvolts = 5000000,
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+ .init_data = &wallvdd_data,
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+ .gpio = -EINVAL,
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+};
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+
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+static struct platform_device wallvdd_device = {
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+ .name = "reg-fixed-voltage",
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+ .id = -1,
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+ .dev = {
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+ .platform_data = &wallvdd_pdata,
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+ },
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+};
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+
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+static struct platform_device *crag6410_devices[] __initdata = {
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+ &s3c_device_hsmmc0,
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+ &s3c_device_hsmmc1,
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+ &s3c_device_hsmmc2,
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+ &s3c_device_i2c0,
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+ &s3c_device_i2c1,
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+ &s3c_device_fb,
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+ &s3c_device_ohci,
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+ &s3c_device_usb_hsotg,
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+ &s3c_device_adc,
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+ &s3c_device_rtc,
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+ &s3c_device_ts,
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+ &s3c_device_timer[0],
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+ &s3c64xx_device_iis0,
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+ &s3c64xx_device_iis1,
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+ &samsung_asoc_dma,
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+ &samsung_device_keypad,
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+ &crag6410_gpio_keydev,
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+ &crag6410_dm9k_device,
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+ &s3c64xx_device_spi0,
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+ &crag6410_mmgpio,
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+ &crag6410_lcd_powerdev,
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+ &crag6410_backlight_device,
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+ &speyside_device,
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+ &speyside_wm8962_device,
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+ &wallvdd_device,
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+};
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+
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+static struct pca953x_platform_data crag6410_pca_data = {
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+ .gpio_base = PCA935X_GPIO_BASE,
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+ .irq_base = 0,
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+};
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+
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+static struct regulator_consumer_supply vddarm_consumers[] __initdata = {
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+ REGULATOR_SUPPLY("vddarm", NULL),
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+};
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+
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+static struct regulator_init_data vddarm __initdata = {
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+ .constraints = {
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+ .name = "VDDARM",
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+ .min_uV = 1000000,
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+ .max_uV = 1300000,
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+ .always_on = 1,
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+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
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+ },
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+ .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
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+ .consumer_supplies = vddarm_consumers,
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+ .supply_regulator = "WALLVDD",
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+};
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+
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+static struct regulator_init_data vddint __initdata = {
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+ .constraints = {
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+ .name = "VDDINT",
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+ .min_uV = 1000000,
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+ .max_uV = 1200000,
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+ .always_on = 1,
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+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
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+ },
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+};
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+
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+static struct regulator_init_data vddmem __initdata = {
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+ .constraints = {
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+ .name = "VDDMEM",
|
|
|
+ .always_on = 1,
|
|
|
+ },
|
|
|
+};
|
|
|
+
|
|
|
+static struct regulator_init_data vddsys __initdata = {
|
|
|
+ .constraints = {
|
|
|
+ .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
|
|
|
+ .always_on = 1,
|
|
|
+ },
|
|
|
+};
|
|
|
+
|
|
|
+static struct regulator_consumer_supply vddmmc_consumers[] __initdata = {
|
|
|
+ REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
|
|
|
+ REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
|
|
|
+ REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
|
|
|
+};
|
|
|
+
|
|
|
+static struct regulator_init_data vddmmc __initdata = {
|
|
|
+ .constraints = {
|
|
|
+ .name = "VDDMMC,UH",
|
|
|
+ .always_on = 1,
|
|
|
+ },
|
|
|
+ .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
|
|
|
+ .consumer_supplies = vddmmc_consumers,
|
|
|
+ .supply_regulator = "WALLVDD",
|
|
|
+};
|
|
|
+
|
|
|
+static struct regulator_init_data vddotgi __initdata = {
|
|
|
+ .constraints = {
|
|
|
+ .name = "VDDOTGi",
|
|
|
+ .always_on = 1,
|
|
|
+ },
|
|
|
+ .supply_regulator = "WALLVDD",
|
|
|
+};
|
|
|
+
|
|
|
+static struct regulator_init_data vddotg __initdata = {
|
|
|
+ .constraints = {
|
|
|
+ .name = "VDDOTG",
|
|
|
+ .always_on = 1,
|
|
|
+ },
|
|
|
+ .supply_regulator = "WALLVDD",
|
|
|
+};
|
|
|
+
|
|
|
+static struct regulator_init_data vddhi __initdata = {
|
|
|
+ .constraints = {
|
|
|
+ .name = "VDDHI",
|
|
|
+ .always_on = 1,
|
|
|
+ },
|
|
|
+ .supply_regulator = "WALLVDD",
|
|
|
+};
|
|
|
+
|
|
|
+static struct regulator_init_data vddadc __initdata = {
|
|
|
+ .constraints = {
|
|
|
+ .name = "VDDADC,VDDDAC",
|
|
|
+ .always_on = 1,
|
|
|
+ },
|
|
|
+ .supply_regulator = "WALLVDD",
|
|
|
+};
|
|
|
+
|
|
|
+static struct regulator_init_data vddmem0 __initdata = {
|
|
|
+ .constraints = {
|
|
|
+ .name = "VDDMEM0",
|
|
|
+ .always_on = 1,
|
|
|
+ },
|
|
|
+ .supply_regulator = "WALLVDD",
|
|
|
+};
|
|
|
+
|
|
|
+static struct regulator_init_data vddpll __initdata = {
|
|
|
+ .constraints = {
|
|
|
+ .name = "VDDPLL",
|
|
|
+ .always_on = 1,
|
|
|
+ },
|
|
|
+ .supply_regulator = "WALLVDD",
|
|
|
+};
|
|
|
+
|
|
|
+static struct regulator_init_data vddlcd __initdata = {
|
|
|
+ .constraints = {
|
|
|
+ .name = "VDDLCD",
|
|
|
+ .always_on = 1,
|
|
|
+ },
|
|
|
+ .supply_regulator = "WALLVDD",
|
|
|
+};
|
|
|
+
|
|
|
+static struct regulator_init_data vddalive __initdata = {
|
|
|
+ .constraints = {
|
|
|
+ .name = "VDDALIVE",
|
|
|
+ .always_on = 1,
|
|
|
+ },
|
|
|
+ .supply_regulator = "WALLVDD",
|
|
|
+};
|
|
|
+
|
|
|
+static struct wm831x_backup_pdata banff_backup_pdata __initdata = {
|
|
|
+ .charger_enable = 1,
|
|
|
+ .vlim = 2500, /* mV */
|
|
|
+ .ilim = 200, /* uA */
|
|
|
+};
|
|
|
+
|
|
|
+static struct wm831x_status_pdata banff_red_led __initdata = {
|
|
|
+ .name = "banff:red:",
|
|
|
+ .default_src = WM831X_STATUS_MANUAL,
|
|
|
+};
|
|
|
+
|
|
|
+static struct wm831x_status_pdata banff_green_led __initdata = {
|
|
|
+ .name = "banff:green:",
|
|
|
+ .default_src = WM831X_STATUS_MANUAL,
|
|
|
+};
|
|
|
+
|
|
|
+static struct wm831x_touch_pdata touch_pdata __initdata = {
|
|
|
+ .data_irq = S3C_EINT(26),
|
|
|
+ .pd_irq = S3C_EINT(27),
|
|
|
+};
|
|
|
+
|
|
|
+static struct wm831x_pdata crag_pmic_pdata __initdata = {
|
|
|
+ .wm831x_num = 1,
|
|
|
+ .irq_base = BANFF_PMIC_IRQ_BASE,
|
|
|
+ .gpio_base = GPIO_BOARD_START + 8,
|
|
|
+
|
|
|
+ .backup = &banff_backup_pdata,
|
|
|
+
|
|
|
+ .gpio_defaults = {
|
|
|
+ /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
|
|
|
+ [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
|
|
|
+ /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
|
|
|
+ [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
|
|
|
+ },
|
|
|
+
|
|
|
+ .dcdc = {
|
|
|
+ &vddarm, /* DCDC1 */
|
|
|
+ &vddint, /* DCDC2 */
|
|
|
+ &vddmem, /* DCDC3 */
|
|
|
+ },
|
|
|
+
|
|
|
+ .ldo = {
|
|
|
+ &vddsys, /* LDO1 */
|
|
|
+ &vddmmc, /* LDO2 */
|
|
|
+ NULL, /* LDO3 */
|
|
|
+ &vddotgi, /* LDO4 */
|
|
|
+ &vddotg, /* LDO5 */
|
|
|
+ &vddhi, /* LDO6 */
|
|
|
+ &vddadc, /* LDO7 */
|
|
|
+ &vddmem0, /* LDO8 */
|
|
|
+ &vddpll, /* LDO9 */
|
|
|
+ &vddlcd, /* LDO10 */
|
|
|
+ &vddalive, /* LDO11 */
|
|
|
+ },
|
|
|
+
|
|
|
+ .status = {
|
|
|
+ &banff_green_led,
|
|
|
+ &banff_red_led,
|
|
|
+ },
|
|
|
+
|
|
|
+ .touch = &touch_pdata,
|
|
|
+};
|
|
|
+
|
|
|
+static struct i2c_board_info i2c_devs0[] __initdata = {
|
|
|
+ { I2C_BOARD_INFO("24c08", 0x50), },
|
|
|
+ { I2C_BOARD_INFO("tca6408", 0x20),
|
|
|
+ .platform_data = &crag6410_pca_data,
|
|
|
+ },
|
|
|
+ { I2C_BOARD_INFO("wm8312", 0x34),
|
|
|
+ .platform_data = &crag_pmic_pdata,
|
|
|
+ .irq = S3C_EINT(23),
|
|
|
+ },
|
|
|
+};
|
|
|
+
|
|
|
+static struct s3c2410_platform_i2c i2c0_pdata = {
|
|
|
+ .frequency = 400000,
|
|
|
+};
|
|
|
+
|
|
|
+static struct regulator_init_data pvdd_1v2 __initdata = {
|
|
|
+ .constraints = {
|
|
|
+ .name = "PVDD_1V2",
|
|
|
+ .always_on = 1,
|
|
|
+ },
|
|
|
+};
|
|
|
+
|
|
|
+static struct regulator_consumer_supply pvdd_1v8_consumers[] __initdata = {
|
|
|
+ REGULATOR_SUPPLY("PLLVDD", "1-001a"),
|
|
|
+ REGULATOR_SUPPLY("DBVDD", "1-001a"),
|
|
|
+ REGULATOR_SUPPLY("CPVDD", "1-001a"),
|
|
|
+ REGULATOR_SUPPLY("AVDD2", "1-001a"),
|
|
|
+ REGULATOR_SUPPLY("DCVDD", "1-001a"),
|
|
|
+ REGULATOR_SUPPLY("AVDD", "1-001a"),
|
|
|
+};
|
|
|
+
|
|
|
+static struct regulator_init_data pvdd_1v8 __initdata = {
|
|
|
+ .constraints = {
|
|
|
+ .name = "PVDD_1V8",
|
|
|
+ .always_on = 1,
|
|
|
+ },
|
|
|
+
|
|
|
+ .consumer_supplies = pvdd_1v8_consumers,
|
|
|
+ .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
|
|
|
+};
|
|
|
+
|
|
|
+static struct regulator_consumer_supply pvdd_3v3_consumers[] __initdata = {
|
|
|
+ REGULATOR_SUPPLY("MICVDD", "1-001a"),
|
|
|
+ REGULATOR_SUPPLY("AVDD1", "1-001a"),
|
|
|
+};
|
|
|
+
|
|
|
+static struct regulator_init_data pvdd_3v3 __initdata = {
|
|
|
+ .constraints = {
|
|
|
+ .name = "PVDD_3V3",
|
|
|
+ .always_on = 1,
|
|
|
+ },
|
|
|
+
|
|
|
+ .consumer_supplies = pvdd_3v3_consumers,
|
|
|
+ .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
|
|
|
+};
|
|
|
+
|
|
|
+static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
|
|
|
+ .wm831x_num = 2,
|
|
|
+ .irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
|
|
|
+ .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
|
|
|
+
|
|
|
+ .gpio_defaults = {
|
|
|
+ /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
|
|
|
+ [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
|
|
|
+ [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
|
|
|
+ [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
|
|
|
+ },
|
|
|
+
|
|
|
+ .dcdc = {
|
|
|
+ &pvdd_1v2, /* DCDC1 */
|
|
|
+ &pvdd_1v8, /* DCDC2 */
|
|
|
+ &pvdd_3v3, /* DCDC3 */
|
|
|
+ },
|
|
|
+
|
|
|
+ .disable_touch = true,
|
|
|
+};
|
|
|
+
|
|
|
+static struct wm8915_retune_mobile_config wm8915_retune[] = {
|
|
|
+ {
|
|
|
+ .name = "Sub LPF",
|
|
|
+ .rate = 48000,
|
|
|
+ .regs = {
|
|
|
+ 0x6318, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
|
|
|
+ 0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
|
|
|
+ 0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
|
|
|
+ },
|
|
|
+ },
|
|
|
+ {
|
|
|
+ .name = "Sub HPF",
|
|
|
+ .rate = 48000,
|
|
|
+ .regs = {
|
|
|
+ 0x000A, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
|
|
|
+ 0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
|
|
|
+ 0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
|
|
|
+ },
|
|
|
+ },
|
|
|
+};
|
|
|
+
|
|
|
+static struct wm8915_pdata wm8915_pdata __initdata = {
|
|
|
+ .ldo_ena = S3C64XX_GPN(7),
|
|
|
+ .gpio_base = CODEC_GPIO_BASE,
|
|
|
+ .micdet_def = 1,
|
|
|
+ .inl_mode = WM8915_DIFFERRENTIAL_1,
|
|
|
+ .inr_mode = WM8915_DIFFERRENTIAL_1,
|
|
|
+
|
|
|
+ .irq_flags = IRQF_TRIGGER_RISING,
|
|
|
+
|
|
|
+ .gpio_default = {
|
|
|
+ 0x8001, /* GPIO1 == ADCLRCLK1 */
|
|
|
+ 0x8001, /* GPIO2 == ADCLRCLK2, input due to CPU */
|
|
|
+ 0x0141, /* GPIO3 == HP_SEL */
|
|
|
+ 0x0002, /* GPIO4 == IRQ */
|
|
|
+ 0x020e, /* GPIO5 == CLKOUT */
|
|
|
+ },
|
|
|
+
|
|
|
+ .retune_mobile_cfgs = wm8915_retune,
|
|
|
+ .num_retune_mobile_cfgs = ARRAY_SIZE(wm8915_retune),
|
|
|
+};
|
|
|
+
|
|
|
+static struct wm8962_pdata wm8962_pdata __initdata = {
|
|
|
+ .gpio_init = {
|
|
|
+ 0,
|
|
|
+ WM8962_GPIO_FN_OPCLK,
|
|
|
+ WM8962_GPIO_FN_DMICCLK,
|
|
|
+ 0,
|
|
|
+ 0x8000 | WM8962_GPIO_FN_DMICDAT,
|
|
|
+ WM8962_GPIO_FN_IRQ, /* Open drain mode */
|
|
|
+ },
|
|
|
+ .irq_active_low = true,
|
|
|
+};
|
|
|
+
|
|
|
+static struct wm9081_pdata wm9081_pdata __initdata = {
|
|
|
+ .irq_high = false,
|
|
|
+ .irq_cmos = false,
|
|
|
+};
|
|
|
+
|
|
|
+static struct i2c_board_info i2c_devs1[] __initdata = {
|
|
|
+ { I2C_BOARD_INFO("wm8311", 0x34),
|
|
|
+ .irq = S3C_EINT(0),
|
|
|
+ .platform_data = &glenfarclas_pmic_pdata },
|
|
|
+
|
|
|
+ { I2C_BOARD_INFO("wm1250-ev1", 0x27) },
|
|
|
+ { I2C_BOARD_INFO("wm8915", 0x1a),
|
|
|
+ .platform_data = &wm8915_pdata,
|
|
|
+ .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
|
|
|
+ },
|
|
|
+ { I2C_BOARD_INFO("wm9081", 0x6c),
|
|
|
+ .platform_data = &wm9081_pdata, },
|
|
|
+ { I2C_BOARD_INFO("wm8962", 0x1a),
|
|
|
+ .platform_data = &wm8962_pdata,
|
|
|
+ .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
|
|
|
+ },
|
|
|
+};
|
|
|
+
|
|
|
+static void __init crag6410_map_io(void)
|
|
|
+{
|
|
|
+ s3c64xx_init_io(NULL, 0);
|
|
|
+ s3c24xx_init_clocks(12000000);
|
|
|
+ s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
|
|
|
+
|
|
|
+ /* LCD type and Bypass set by bootloader */
|
|
|
+}
|
|
|
+
|
|
|
+static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
|
|
|
+ .max_width = 4,
|
|
|
+ .cd_type = S3C_SDHCI_CD_PERMANENT,
|
|
|
+};
|
|
|
+
|
|
|
+static struct s3c_sdhci_platdata crag6410_hsmmc1_pdata = {
|
|
|
+ .max_width = 4,
|
|
|
+ .cd_type = S3C_SDHCI_CD_GPIO,
|
|
|
+ .ext_cd_gpio = S3C64XX_GPF(11),
|
|
|
+};
|
|
|
+
|
|
|
+static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
|
|
|
+{
|
|
|
+ /* Set all the necessary GPG pins to special-function 2 */
|
|
|
+ s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
|
|
|
+
|
|
|
+ /* force card-detected for prototype 0 */
|
|
|
+ s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
|
|
|
+}
|
|
|
+
|
|
|
+static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
|
|
|
+ .max_width = 4,
|
|
|
+ .cd_type = S3C_SDHCI_CD_INTERNAL,
|
|
|
+ .cfg_gpio = crag6410_cfg_sdhci0,
|
|
|
+};
|
|
|
+
|
|
|
+static void __init crag6410_machine_init(void)
|
|
|
+{
|
|
|
+ /* Open drain IRQs need pullups */
|
|
|
+ s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
|
|
|
+ s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
|
|
|
+
|
|
|
+ gpio_request(S3C64XX_GPB(0), "LCD power");
|
|
|
+ gpio_direction_output(S3C64XX_GPB(0), 0);
|
|
|
+
|
|
|
+ gpio_request(S3C64XX_GPF(14), "LCD PWM");
|
|
|
+ gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */
|
|
|
+
|
|
|
+ gpio_request(S3C64XX_GPB(1), "SD power");
|
|
|
+ gpio_direction_output(S3C64XX_GPB(1), 0);
|
|
|
+
|
|
|
+ gpio_request(S3C64XX_GPF(10), "nRESETSEL");
|
|
|
+ gpio_direction_output(S3C64XX_GPF(10), 1);
|
|
|
+
|
|
|
+ s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
|
|
|
+ s3c_sdhci1_set_platdata(&crag6410_hsmmc1_pdata);
|
|
|
+ s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
|
|
|
+
|
|
|
+ s3c_i2c0_set_platdata(&i2c0_pdata);
|
|
|
+ s3c_i2c1_set_platdata(NULL);
|
|
|
+ s3c_fb_set_platdata(&crag6410_lcd_pdata);
|
|
|
+
|
|
|
+ i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
|
|
|
+ i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
|
|
|
+
|
|
|
+ samsung_keypad_set_platdata(&crag6410_keypad_data);
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|
|
+
|
|
|
+ platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
|
|
|
+
|
|
|
+ regulator_has_full_constraints();
|
|
|
+
|
|
|
+ s3c_pm_init();
|
|
|
+}
|
|
|
+
|
|
|
+MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
|
|
|
+ /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
|
|
|
+ .boot_params = S3C64XX_PA_SDRAM + 0x100,
|
|
|
+ .init_irq = s3c6410_init_irq,
|
|
|
+ .map_io = crag6410_map_io,
|
|
|
+ .init_machine = crag6410_machine_init,
|
|
|
+ .timer = &s3c24xx_timer,
|
|
|
+MACHINE_END
|
Linus Torvalds