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+Freescale i.MX IPUv3
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+====================
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+
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+Required properties:
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+- compatible: Should be "fsl,<chip>-ipu"
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+- reg: should be register base and length as documented in the
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+ datasheet
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+- interrupts: Should contain sync interrupt and error interrupt,
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+ in this order.
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+- #crtc-cells: 1, See below
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+
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+example:
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+
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+ipu: ipu@18000000 {
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+ #crtc-cells = <1>;
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+ compatible = "fsl,imx53-ipu";
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+ reg = <0x18000000 0x080000000>;
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+ interrupts = <11 10>;
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+};
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+
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+Parallel display support
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+========================
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+
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+Required properties:
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+- compatible: Should be "fsl,imx-parallel-display"
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+- crtc: the crtc this display is connected to, see below
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+Optional properties:
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+- interface_pix_fmt: How this display is connected to the
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+ crtc. Currently supported types: "rgb24", "rgb565"
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+- edid: verbatim EDID data block describing attached display.
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+- ddc: phandle describing the i2c bus handling the display data
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+ channel
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+
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+example:
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+
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+display@di0 {
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+ compatible = "fsl,imx-parallel-display";
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+ edid = [edid-data];
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+ crtc = <&ipu 0>;
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+ interface-pix-fmt = "rgb24";
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+};
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