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@@ -1,11 +1,8 @@
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/*
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- * Support for LGDT3302 & LGDT3303 (DViCO FusionHDTV Gold) - VSB/QAM
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+ * Support for LGDT3302 and LGDT3303 - VSB/QAM
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*
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* Copyright (C) 2005 Wilson Michaels <wilsonmichaels@earthlink.net>
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*
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- * Based on code from Kirk Lapray <kirk_lapray@bigfoot.com>
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- * Copyright (C) 2005
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- *
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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@@ -25,11 +22,13 @@
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/*
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* NOTES ABOUT THIS DRIVER
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*
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- * This driver supports DViCO FusionHDTV Gold under Linux.
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+ * This Linux driver supports:
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+ * DViCO FusionHDTV 3 Gold-Q
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+ * DViCO FusionHDTV 3 Gold-T
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+ * DViCO FusionHDTV 5 Gold
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*
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* TODO:
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- * BER and signal strength always return 0.
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- * Include support for LGDT3303
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+ * signal strength always returns 0.
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*
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*/
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@@ -41,7 +40,6 @@
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#include <asm/byteorder.h>
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#include "dvb_frontend.h"
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-#include "dvb-pll.h"
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#include "lgdt330x_priv.h"
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#include "lgdt330x.h"
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@@ -70,55 +68,37 @@ struct lgdt330x_state
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u32 current_frequency;
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};
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-static int i2c_writebytes (struct lgdt330x_state* state,
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- u8 addr, /* demod_address or pll_address */
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+static int i2c_write_demod_bytes (struct lgdt330x_state* state,
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u8 *buf, /* data bytes to send */
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int len /* number of bytes to send */ )
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{
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- u8 tmp[] = { buf[0], buf[1] };
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struct i2c_msg msg =
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- { .addr = addr, .flags = 0, .buf = tmp, .len = 2 };
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- int err;
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+ { .addr = state->config->demod_address,
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+ .flags = 0,
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+ .buf = buf,
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+ .len = 2 };
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int i;
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+ int err;
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- for (i=1; i<len; i++) {
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- tmp[1] = buf[i];
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+ for (i=0; i<len-1; i+=2){
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if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
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- printk(KERN_WARNING "lgdt330x: %s error (addr %02x <- %02x, err == %i)\n", __FUNCTION__, addr, buf[0], err);
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+ printk(KERN_WARNING "lgdt330x: %s error (addr %02x <- %02x, err = %i)\n", __FUNCTION__, msg.buf[0], msg.buf[1], err);
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if (err < 0)
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return err;
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else
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return -EREMOTEIO;
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}
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- tmp[0]++;
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+ msg.buf += 2;
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}
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return 0;
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}
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-#if 0
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-static int i2c_readbytes (struct lgdt330x_state* state,
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- u8 addr, /* demod_address or pll_address */
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- u8 *buf, /* holds data bytes read */
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- int len /* number of bytes to read */ )
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-{
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- struct i2c_msg msg =
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- { .addr = addr, .flags = I2C_M_RD, .buf = buf, .len = len };
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- int err;
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-
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- if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
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- printk(KERN_WARNING "lgdt330x: %s error (addr %02x, err == %i)\n", __FUNCTION__, addr, err);
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- return -EREMOTEIO;
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- }
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- return 0;
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-}
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-#endif
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-
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/*
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* This routine writes the register (reg) to the demod bus
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* then reads the data returned for (len) bytes.
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*/
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-static u8 i2c_selectreadbytes (struct lgdt330x_state* state,
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+static u8 i2c_read_demod_bytes (struct lgdt330x_state* state,
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enum I2C_REG reg, u8* buf, int len)
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{
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u8 wr [] = { reg };
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@@ -139,7 +119,7 @@ static u8 i2c_selectreadbytes (struct lgdt330x_state* state,
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}
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/* Software reset */
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-int lgdt330x_SwReset(struct lgdt330x_state* state)
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+static int lgdt3302_SwReset(struct lgdt330x_state* state)
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{
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u8 ret;
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u8 reset[] = {
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@@ -148,23 +128,51 @@ int lgdt330x_SwReset(struct lgdt330x_state* state)
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* bits 5-0 are 1 to mask interrupts */
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};
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- ret = i2c_writebytes(state,
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- state->config->demod_address,
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+ ret = i2c_write_demod_bytes(state,
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+ reset, sizeof(reset));
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+ if (ret == 0) {
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+
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+ /* force reset high (inactive) and unmask interrupts */
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+ reset[1] = 0x7f;
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+ ret = i2c_write_demod_bytes(state,
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+ reset, sizeof(reset));
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+ }
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+ return ret;
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+}
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+
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+static int lgdt3303_SwReset(struct lgdt330x_state* state)
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+{
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+ u8 ret;
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+ u8 reset[] = {
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+ 0x02,
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+ 0x00 /* bit 0 is active low software reset */
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+ };
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+
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+ ret = i2c_write_demod_bytes(state,
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reset, sizeof(reset));
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if (ret == 0) {
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- /* spec says reset takes 100 ns why wait */
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- /* mdelay(100); */ /* keep low for 100mS */
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- reset[1] = 0x7f; /* force reset high (inactive)
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- * and unmask interrupts */
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- ret = i2c_writebytes(state,
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- state->config->demod_address,
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+
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+ /* force reset high (inactive) */
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+ reset[1] = 0x01;
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+ ret = i2c_write_demod_bytes(state,
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reset, sizeof(reset));
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}
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- /* Spec does not indicate a need for this either */
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- /*mdelay(5); */ /* wait 5 msec before doing more */
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return ret;
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}
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+static int lgdt330x_SwReset(struct lgdt330x_state* state)
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+{
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+ switch (state->config->demod_chip) {
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+ case LGDT3302:
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+ return lgdt3302_SwReset(state);
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+ case LGDT3303:
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+ return lgdt3303_SwReset(state);
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+ default:
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+ return -ENODEV;
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+ }
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+}
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+
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+
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static int lgdt330x_init(struct dvb_frontend* fe)
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{
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/* Hardware reset is done using gpio[0] of cx23880x chip.
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@@ -173,22 +181,98 @@ static int lgdt330x_init(struct dvb_frontend* fe)
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* Maybe there needs to be a callable function in cx88-core or
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* the caller of this function needs to do it. */
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- dprintk("%s entered\n", __FUNCTION__);
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- return lgdt330x_SwReset((struct lgdt330x_state*) fe->demodulator_priv);
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+ /*
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+ * Array of byte pairs <address, value>
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+ * to initialize each different chip
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+ */
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+ static u8 lgdt3302_init_data[] = {
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+ /* Use 50MHz parameter values from spec sheet since xtal is 50 */
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+ /* Change the value of NCOCTFV[25:0] of carrier
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+ recovery center frequency register */
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+ VSB_CARRIER_FREQ0, 0x00,
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+ VSB_CARRIER_FREQ1, 0x87,
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+ VSB_CARRIER_FREQ2, 0x8e,
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+ VSB_CARRIER_FREQ3, 0x01,
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+ /* Change the TPCLK pin polarity
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+ data is valid on falling clock */
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+ DEMUX_CONTROL, 0xfb,
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+ /* Change the value of IFBW[11:0] of
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+ AGC IF/RF loop filter bandwidth register */
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+ AGC_RF_BANDWIDTH0, 0x40,
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+ AGC_RF_BANDWIDTH1, 0x93,
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+ AGC_RF_BANDWIDTH2, 0x00,
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+ /* Change the value of bit 6, 'nINAGCBY' and
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+ 'NSSEL[1:0] of ACG function control register 2 */
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+ AGC_FUNC_CTRL2, 0xc6,
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+ /* Change the value of bit 6 'RFFIX'
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+ of AGC function control register 3 */
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+ AGC_FUNC_CTRL3, 0x40,
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+ /* Set the value of 'INLVTHD' register 0x2a/0x2c
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+ to 0x7fe */
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+ AGC_DELAY0, 0x07,
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+ AGC_DELAY2, 0xfe,
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+ /* Change the value of IAGCBW[15:8]
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+ of inner AGC loop filter bandwith */
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+ AGC_LOOP_BANDWIDTH0, 0x08,
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+ AGC_LOOP_BANDWIDTH1, 0x9a
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+ };
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+
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+ static u8 lgdt3303_init_data[] = {
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+ 0x4c, 0x14
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+ };
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+
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+ struct lgdt330x_state* state = fe->demodulator_priv;
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+ char *chip_name;
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+ int err;
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+
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+ switch (state->config->demod_chip) {
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+ case LGDT3302:
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+ chip_name = "LGDT3302";
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+ err = i2c_write_demod_bytes(state, lgdt3302_init_data,
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+ sizeof(lgdt3302_init_data));
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+ break;
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+ case LGDT3303:
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+ chip_name = "LGDT3303";
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+ err = i2c_write_demod_bytes(state, lgdt3303_init_data,
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+ sizeof(lgdt3303_init_data));
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+ break;
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+ default:
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+ chip_name = "undefined";
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+ printk (KERN_WARNING "Only LGDT3302 and LGDT3303 are supported chips.\n");
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+ err = -ENODEV;
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+ }
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+ dprintk("%s entered as %s\n", __FUNCTION__, chip_name);
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+ if (err < 0)
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+ return err;
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+ return lgdt330x_SwReset(state);
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}
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static int lgdt330x_read_ber(struct dvb_frontend* fe, u32* ber)
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{
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- *ber = 0; /* Dummy out for now */
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+ *ber = 0; /* Not supplied by the demod chips */
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return 0;
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}
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static int lgdt330x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
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{
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- struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
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+ struct lgdt330x_state* state = fe->demodulator_priv;
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+ int err;
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u8 buf[2];
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- i2c_selectreadbytes(state, PACKET_ERR_COUNTER1, buf, sizeof(buf));
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+ switch (state->config->demod_chip) {
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+ case LGDT3302:
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+ err = i2c_read_demod_bytes(state, LGDT3302_PACKET_ERR_COUNTER1,
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+ buf, sizeof(buf));
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+ break;
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+ case LGDT3303:
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+ err = i2c_read_demod_bytes(state, LGDT3303_PACKET_ERR_COUNTER1,
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+ buf, sizeof(buf));
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+ break;
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+ default:
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+ printk(KERN_WARNING
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+ "Only LGDT3302 and LGDT3303 are supported chips.\n");
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+ err = -ENODEV;
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+ }
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*ucblocks = (buf[0] << 8) | buf[1];
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return 0;
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@@ -197,123 +281,113 @@ static int lgdt330x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
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static int lgdt330x_set_parameters(struct dvb_frontend* fe,
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struct dvb_frontend_parameters *param)
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{
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- struct lgdt330x_state* state =
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- (struct lgdt330x_state*) fe->demodulator_priv;
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+ /*
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+ * Array of byte pairs <address, value>
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+ * to initialize 8VSB for lgdt3303 chip 50 MHz IF
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+ */
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+ static u8 lgdt3303_8vsb_44_data[] = {
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+ 0x04, 0x00,
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+ 0x0d, 0x40,
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+ 0x0e, 0x87,
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+ 0x0f, 0x8e,
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+ 0x10, 0x01,
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+ 0x47, 0x8b };
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+
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+ /*
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+ * Array of byte pairs <address, value>
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+ * to initialize QAM for lgdt3303 chip
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+ */
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+ static u8 lgdt3303_qam_data[] = {
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+ 0x04, 0x00,
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+ 0x0d, 0x00,
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+ 0x0e, 0x00,
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+ 0x0f, 0x00,
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+ 0x10, 0x00,
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+ 0x51, 0x63,
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+ 0x47, 0x66,
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+ 0x48, 0x66,
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+ 0x4d, 0x1a,
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+ 0x49, 0x08,
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+ 0x4a, 0x9b };
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+
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+ struct lgdt330x_state* state = fe->demodulator_priv;
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- /* Use 50MHz parameter values from spec sheet since xtal is 50 */
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static u8 top_ctrl_cfg[] = { TOP_CONTROL, 0x03 };
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- static u8 vsb_freq_cfg[] = { VSB_CARRIER_FREQ0, 0x00, 0x87, 0x8e, 0x01 };
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- static u8 demux_ctrl_cfg[] = { DEMUX_CONTROL, 0xfb };
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- static u8 agc_rf_cfg[] = { AGC_RF_BANDWIDTH0, 0x40, 0x93, 0x00 };
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- static u8 agc_ctrl_cfg[] = { AGC_FUNC_CTRL2, 0xc6, 0x40 };
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- static u8 agc_delay_cfg[] = { AGC_DELAY0, 0x07, 0x00, 0xfe };
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- static u8 agc_loop_cfg[] = { AGC_LOOP_BANDWIDTH0, 0x08, 0x9a };
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+ int err;
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/* Change only if we are actually changing the modulation */
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if (state->current_modulation != param->u.vsb.modulation) {
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switch(param->u.vsb.modulation) {
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case VSB_8:
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dprintk("%s: VSB_8 MODE\n", __FUNCTION__);
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- /* Select VSB mode and serial MPEG interface */
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- top_ctrl_cfg[1] = 0x07;
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+ /* Select VSB mode */
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+ top_ctrl_cfg[1] = 0x03;
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/* Select ANT connector if supported by card */
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if (state->config->pll_rf_set)
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state->config->pll_rf_set(fe, 1);
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+
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+ if (state->config->demod_chip == LGDT3303) {
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+ err = i2c_write_demod_bytes(state, lgdt3303_8vsb_44_data,
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+ sizeof(lgdt3303_8vsb_44_data));
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+ }
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break;
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case QAM_64:
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dprintk("%s: QAM_64 MODE\n", __FUNCTION__);
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- /* Select QAM_64 mode and serial MPEG interface */
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- top_ctrl_cfg[1] = 0x04;
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+ /* Select QAM_64 mode */
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+ top_ctrl_cfg[1] = 0x00;
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/* Select CABLE connector if supported by card */
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if (state->config->pll_rf_set)
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state->config->pll_rf_set(fe, 0);
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+
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+ if (state->config->demod_chip == LGDT3303) {
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+ err = i2c_write_demod_bytes(state, lgdt3303_qam_data,
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+ sizeof(lgdt3303_qam_data));
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+ }
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break;
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case QAM_256:
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dprintk("%s: QAM_256 MODE\n", __FUNCTION__);
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- /* Select QAM_256 mode and serial MPEG interface */
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- top_ctrl_cfg[1] = 0x05;
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+ /* Select QAM_256 mode */
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+ top_ctrl_cfg[1] = 0x01;
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/* Select CABLE connector if supported by card */
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if (state->config->pll_rf_set)
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state->config->pll_rf_set(fe, 0);
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+
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+ if (state->config->demod_chip == LGDT3303) {
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+ err = i2c_write_demod_bytes(state, lgdt3303_qam_data,
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+ sizeof(lgdt3303_qam_data));
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+ }
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break;
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default:
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printk(KERN_WARNING "lgdt330x: %s: Modulation type(%d) UNSUPPORTED\n", __FUNCTION__, param->u.vsb.modulation);
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return -1;
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}
|
|
|
- /* Initializations common to all modes */
|
|
|
+ /*
|
|
|
+ * select serial or parallel MPEG harware interface
|
|
|
+ * Serial: 0x04 for LGDT3302 or 0x40 for LGDT3303
|
|
|
+ * Parallel: 0x00
|
|
|
+ */
|
|
|
+ top_ctrl_cfg[1] |= state->config->serial_mpeg;
|
|
|
|
|
|
/* Select the requested mode */
|
|
|
- i2c_writebytes(state, state->config->demod_address,
|
|
|
- top_ctrl_cfg, sizeof(top_ctrl_cfg));
|
|
|
-
|
|
|
- /* Change the value of IFBW[11:0]
|
|
|
- of AGC IF/RF loop filter bandwidth register */
|
|
|
- i2c_writebytes(state, state->config->demod_address,
|
|
|
- agc_rf_cfg, sizeof(agc_rf_cfg));
|
|
|
-
|
|
|
- /* Change the value of bit 6, 'nINAGCBY' and
|
|
|
- 'NSSEL[1:0] of ACG function control register 2 */
|
|
|
- /* Change the value of bit 6 'RFFIX'
|
|
|
- of AGC function control register 3 */
|
|
|
- i2c_writebytes(state, state->config->demod_address,
|
|
|
- agc_ctrl_cfg, sizeof(agc_ctrl_cfg));
|
|
|
-
|
|
|
- /* Change the TPCLK pin polarity
|
|
|
- data is valid on falling clock */
|
|
|
- i2c_writebytes(state, state->config->demod_address,
|
|
|
- demux_ctrl_cfg, sizeof(demux_ctrl_cfg));
|
|
|
-
|
|
|
- /* Change the value of NCOCTFV[25:0] of carrier
|
|
|
- recovery center frequency register */
|
|
|
- i2c_writebytes(state, state->config->demod_address,
|
|
|
- vsb_freq_cfg, sizeof(vsb_freq_cfg));
|
|
|
-
|
|
|
- /* Set the value of 'INLVTHD' register 0x2a/0x2c to 0x7fe */
|
|
|
- i2c_writebytes(state, state->config->demod_address,
|
|
|
- agc_delay_cfg, sizeof(agc_delay_cfg));
|
|
|
-
|
|
|
- /* Change the value of IAGCBW[15:8]
|
|
|
- of inner AGC loop filter bandwith */
|
|
|
- i2c_writebytes(state, state->config->demod_address,
|
|
|
- agc_loop_cfg, sizeof(agc_loop_cfg));
|
|
|
-
|
|
|
+ i2c_write_demod_bytes(state, top_ctrl_cfg,
|
|
|
+ sizeof(top_ctrl_cfg));
|
|
|
state->config->set_ts_params(fe, 0);
|
|
|
state->current_modulation = param->u.vsb.modulation;
|
|
|
}
|
|
|
|
|
|
/* Change only if we are actually changing the channel */
|
|
|
if (state->current_frequency != param->frequency) {
|
|
|
- u8 buf[5];
|
|
|
- struct i2c_msg msg = { .flags = 0, .buf = &buf[1], .len = 4 };
|
|
|
- int err;
|
|
|
-
|
|
|
- state->config->pll_set(fe, param, buf);
|
|
|
- msg.addr = buf[0];
|
|
|
-
|
|
|
- dprintk("%s: tuner at 0x%02x bytes: 0x%02x 0x%02x "
|
|
|
- "0x%02x 0x%02x\n", __FUNCTION__,
|
|
|
- buf[0],buf[1],buf[2],buf[3],buf[4]);
|
|
|
- if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
|
|
|
- printk(KERN_WARNING "lgdt330x: %s error (addr %02x <- %02x, err = %i)\n", __FUNCTION__, buf[0], buf[1], err);
|
|
|
- if (err < 0)
|
|
|
- return err;
|
|
|
- else
|
|
|
- return -EREMOTEIO;
|
|
|
- }
|
|
|
-#if 0
|
|
|
- /* Check the status of the tuner pll */
|
|
|
- i2c_readbytes(state, buf[0], &buf[1], 1);
|
|
|
- dprintk("%s: tuner status byte = 0x%02x\n", __FUNCTION__, buf[1]);
|
|
|
-#endif
|
|
|
- /* Update current frequency */
|
|
|
+ /* Tune to the new frequency */
|
|
|
+ state->config->pll_set(fe, param);
|
|
|
+ /* Keep track of the new frequency */
|
|
|
state->current_frequency = param->frequency;
|
|
|
}
|
|
|
lgdt330x_SwReset(state);
|
|
@@ -328,21 +402,15 @@ static int lgdt330x_get_frontend(struct dvb_frontend* fe,
|
|
|
return 0;
|
|
|
}
|
|
|
|
|
|
-static int lgdt330x_read_status(struct dvb_frontend* fe, fe_status_t* status)
|
|
|
+static int lgdt3302_read_status(struct dvb_frontend* fe, fe_status_t* status)
|
|
|
{
|
|
|
- struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
|
|
|
+ struct lgdt330x_state* state = fe->demodulator_priv;
|
|
|
u8 buf[3];
|
|
|
|
|
|
*status = 0; /* Reset status result */
|
|
|
|
|
|
- /*
|
|
|
- * You must set the Mask bits to 1 in the IRQ_MASK in order
|
|
|
- * to see that status bit in the IRQ_STATUS register.
|
|
|
- * This is done in SwReset();
|
|
|
- */
|
|
|
-
|
|
|
/* AGC status register */
|
|
|
- i2c_selectreadbytes(state, AGC_STATUS, buf, 1);
|
|
|
+ i2c_read_demod_bytes(state, AGC_STATUS, buf, 1);
|
|
|
dprintk("%s: AGC_STATUS = 0x%02x\n", __FUNCTION__, buf[0]);
|
|
|
if ((buf[0] & 0x0c) == 0x8){
|
|
|
/* Test signal does not exist flag */
|
|
@@ -353,16 +421,15 @@ static int lgdt330x_read_status(struct dvb_frontend* fe, fe_status_t* status)
|
|
|
return 0;
|
|
|
}
|
|
|
|
|
|
+ /*
|
|
|
+ * You must set the Mask bits to 1 in the IRQ_MASK in order
|
|
|
+ * to see that status bit in the IRQ_STATUS register.
|
|
|
+ * This is done in SwReset();
|
|
|
+ */
|
|
|
/* signal status */
|
|
|
- i2c_selectreadbytes(state, TOP_CONTROL, buf, sizeof(buf));
|
|
|
+ i2c_read_demod_bytes(state, TOP_CONTROL, buf, sizeof(buf));
|
|
|
dprintk("%s: TOP_CONTROL = 0x%02x, IRO_MASK = 0x%02x, IRQ_STATUS = 0x%02x\n", __FUNCTION__, buf[0], buf[1], buf[2]);
|
|
|
|
|
|
-#if 0
|
|
|
- /* Alternative method to check for a signal */
|
|
|
- /* using the SNR good/bad interrupts. */
|
|
|
- if ((buf[2] & 0x30) == 0x10)
|
|
|
- *status |= FE_HAS_SIGNAL;
|
|
|
-#endif
|
|
|
|
|
|
/* sync status */
|
|
|
if ((buf[2] & 0x03) == 0x01) {
|
|
@@ -376,7 +443,7 @@ static int lgdt330x_read_status(struct dvb_frontend* fe, fe_status_t* status)
|
|
|
}
|
|
|
|
|
|
/* Carrier Recovery Lock Status Register */
|
|
|
- i2c_selectreadbytes(state, CARRIER_LOCK, buf, 1);
|
|
|
+ i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
|
|
|
dprintk("%s: CARRIER_LOCK = 0x%02x\n", __FUNCTION__, buf[0]);
|
|
|
switch (state->current_modulation) {
|
|
|
case QAM_256:
|
|
@@ -396,13 +463,75 @@ static int lgdt330x_read_status(struct dvb_frontend* fe, fe_status_t* status)
|
|
|
return 0;
|
|
|
}
|
|
|
|
|
|
+static int lgdt3303_read_status(struct dvb_frontend* fe, fe_status_t* status)
|
|
|
+{
|
|
|
+ struct lgdt330x_state* state = fe->demodulator_priv;
|
|
|
+ int err;
|
|
|
+ u8 buf[3];
|
|
|
+
|
|
|
+ *status = 0; /* Reset status result */
|
|
|
+
|
|
|
+ /* lgdt3303 AGC status register */
|
|
|
+ err = i2c_read_demod_bytes(state, 0x58, buf, 1);
|
|
|
+ if (err < 0)
|
|
|
+ return err;
|
|
|
+
|
|
|
+ dprintk("%s: AGC_STATUS = 0x%02x\n", __FUNCTION__, buf[0]);
|
|
|
+ if ((buf[0] & 0x21) == 0x01){
|
|
|
+ /* Test input signal does not exist flag */
|
|
|
+ /* as well as the AGC lock flag. */
|
|
|
+ *status |= FE_HAS_SIGNAL;
|
|
|
+ } else {
|
|
|
+ /* Without a signal all other status bits are meaningless */
|
|
|
+ return 0;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Carrier Recovery Lock Status Register */
|
|
|
+ i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
|
|
|
+ dprintk("%s: CARRIER_LOCK = 0x%02x\n", __FUNCTION__, buf[0]);
|
|
|
+ switch (state->current_modulation) {
|
|
|
+ case QAM_256:
|
|
|
+ case QAM_64:
|
|
|
+ /* Need to undestand why there are 3 lock levels here */
|
|
|
+ if ((buf[0] & 0x07) == 0x07)
|
|
|
+ *status |= FE_HAS_CARRIER;
|
|
|
+ else
|
|
|
+ break;
|
|
|
+ i2c_read_demod_bytes(state, 0x8a, buf, 1);
|
|
|
+ if ((buf[0] & 0x04) == 0x04)
|
|
|
+ *status |= FE_HAS_SYNC;
|
|
|
+ if ((buf[0] & 0x01) == 0x01)
|
|
|
+ *status |= FE_HAS_LOCK;
|
|
|
+ if ((buf[0] & 0x08) == 0x08)
|
|
|
+ *status |= FE_HAS_VITERBI;
|
|
|
+ break;
|
|
|
+ case VSB_8:
|
|
|
+ if ((buf[0] & 0x80) == 0x80)
|
|
|
+ *status |= FE_HAS_CARRIER;
|
|
|
+ else
|
|
|
+ break;
|
|
|
+ i2c_read_demod_bytes(state, 0x38, buf, 1);
|
|
|
+ if ((buf[0] & 0x02) == 0x00)
|
|
|
+ *status |= FE_HAS_SYNC;
|
|
|
+ if ((buf[0] & 0x01) == 0x01) {
|
|
|
+ *status |= FE_HAS_LOCK;
|
|
|
+ *status |= FE_HAS_VITERBI;
|
|
|
+ }
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ printk("KERN_WARNING lgdt330x: %s: Modulation set to unsupported value\n", __FUNCTION__);
|
|
|
+ }
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
static int lgdt330x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
|
|
|
{
|
|
|
/* not directly available. */
|
|
|
+ *strength = 0;
|
|
|
return 0;
|
|
|
}
|
|
|
|
|
|
-static int lgdt330x_read_snr(struct dvb_frontend* fe, u16* snr)
|
|
|
+static int lgdt3302_read_snr(struct dvb_frontend* fe, u16* snr)
|
|
|
{
|
|
|
#ifdef SNR_IN_DB
|
|
|
/*
|
|
@@ -451,7 +580,7 @@ static int lgdt330x_read_snr(struct dvb_frontend* fe, u16* snr)
|
|
|
91, 115, 144, 182, 229, 288, 362, 456, 574, 722,
|
|
|
909, 1144, 1440, 1813, 2282, 2873, 3617, 4553, 5732, 7216,
|
|
|
9084, 11436, 14396, 18124, 22817, 28724, 36161, 45524, 57312, 72151,
|
|
|
- 90833, 114351, 143960, 181235, 228161, 0x040000
|
|
|
+ 90833, 114351, 143960, 181235, 228161, 0x080000
|
|
|
};
|
|
|
|
|
|
static u8 buf[5];/* read data buffer */
|
|
@@ -459,8 +588,8 @@ static int lgdt330x_read_snr(struct dvb_frontend* fe, u16* snr)
|
|
|
static u32 snr_db; /* index into SNR_EQ[] */
|
|
|
struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
|
|
|
|
|
|
- /* read both equalizer and pase tracker noise data */
|
|
|
- i2c_selectreadbytes(state, EQPH_ERR0, buf, sizeof(buf));
|
|
|
+ /* read both equalizer and phase tracker noise data */
|
|
|
+ i2c_read_demod_bytes(state, EQPH_ERR0, buf, sizeof(buf));
|
|
|
|
|
|
if (state->current_modulation == VSB_8) {
|
|
|
/* Equalizer Mean-Square Error Register for VSB */
|
|
@@ -496,19 +625,20 @@ static int lgdt330x_read_snr(struct dvb_frontend* fe, u16* snr)
|
|
|
struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
|
|
|
|
|
|
/* read both equalizer and pase tracker noise data */
|
|
|
- i2c_selectreadbytes(state, EQPH_ERR0, buf, sizeof(buf));
|
|
|
+ i2c_read_demod_bytes(state, EQPH_ERR0, buf, sizeof(buf));
|
|
|
|
|
|
if (state->current_modulation == VSB_8) {
|
|
|
- /* Equalizer Mean-Square Error Register for VSB */
|
|
|
- noise = ((buf[0] & 7) << 16) | (buf[1] << 8) | buf[2];
|
|
|
- } else {
|
|
|
- /* Phase Tracker Mean-Square Error Register for QAM */
|
|
|
+ /* Phase Tracker Mean-Square Error Register for VSB */
|
|
|
noise = ((buf[0] & 7<<3) << 13) | (buf[3] << 8) | buf[4];
|
|
|
+ } else {
|
|
|
+
|
|
|
+ /* Carrier Recovery Mean-Square Error for QAM */
|
|
|
+ i2c_read_demod_bytes(state, 0x1a, buf, 2);
|
|
|
+ noise = ((buf[0] & 3) << 8) | buf[1];
|
|
|
}
|
|
|
|
|
|
/* Small values for noise mean signal is better so invert noise */
|
|
|
- /* Noise is 19 bit value so discard 3 LSB*/
|
|
|
- *snr = ~noise>>3;
|
|
|
+ *snr = ~noise;
|
|
|
#endif
|
|
|
|
|
|
dprintk("%s: noise = 0x%05x, snr = %idb\n",__FUNCTION__, noise, *snr);
|
|
@@ -516,6 +646,32 @@ static int lgdt330x_read_snr(struct dvb_frontend* fe, u16* snr)
|
|
|
return 0;
|
|
|
}
|
|
|
|
|
|
+static int lgdt3303_read_snr(struct dvb_frontend* fe, u16* snr)
|
|
|
+{
|
|
|
+ /* Return the raw noise value */
|
|
|
+ static u8 buf[5];/* read data buffer */
|
|
|
+ static u32 noise; /* noise value */
|
|
|
+ struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
|
|
|
+
|
|
|
+ if (state->current_modulation == VSB_8) {
|
|
|
+
|
|
|
+ /* Phase Tracker Mean-Square Error Register for VSB */
|
|
|
+ noise = ((buf[0] & 7) << 16) | (buf[3] << 8) | buf[4];
|
|
|
+ } else {
|
|
|
+
|
|
|
+ /* Carrier Recovery Mean-Square Error for QAM */
|
|
|
+ i2c_read_demod_bytes(state, 0x1a, buf, 2);
|
|
|
+ noise = (buf[0] << 8) | buf[1];
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Small values for noise mean signal is better so invert noise */
|
|
|
+ *snr = ~noise;
|
|
|
+
|
|
|
+ dprintk("%s: noise = 0x%05x, snr = %idb\n",__FUNCTION__, noise, *snr);
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
static int lgdt330x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
|
|
|
{
|
|
|
/* I have no idea about this - it may not be needed */
|
|
@@ -531,7 +687,8 @@ static void lgdt330x_release(struct dvb_frontend* fe)
|
|
|
kfree(state);
|
|
|
}
|
|
|
|
|
|
-static struct dvb_frontend_ops lgdt330x_ops;
|
|
|
+static struct dvb_frontend_ops lgdt3302_ops;
|
|
|
+static struct dvb_frontend_ops lgdt3303_ops;
|
|
|
|
|
|
struct dvb_frontend* lgdt330x_attach(const struct lgdt330x_config* config,
|
|
|
struct i2c_adapter* i2c)
|
|
@@ -548,9 +705,19 @@ struct dvb_frontend* lgdt330x_attach(const struct lgdt330x_config* config,
|
|
|
/* Setup the state */
|
|
|
state->config = config;
|
|
|
state->i2c = i2c;
|
|
|
- memcpy(&state->ops, &lgdt330x_ops, sizeof(struct dvb_frontend_ops));
|
|
|
+ switch (config->demod_chip) {
|
|
|
+ case LGDT3302:
|
|
|
+ memcpy(&state->ops, &lgdt3302_ops, sizeof(struct dvb_frontend_ops));
|
|
|
+ break;
|
|
|
+ case LGDT3303:
|
|
|
+ memcpy(&state->ops, &lgdt3303_ops, sizeof(struct dvb_frontend_ops));
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ goto error;
|
|
|
+ }
|
|
|
+
|
|
|
/* Verify communication with demod chip */
|
|
|
- if (i2c_selectreadbytes(state, 2, buf, 1))
|
|
|
+ if (i2c_read_demod_bytes(state, 2, buf, 1))
|
|
|
goto error;
|
|
|
|
|
|
state->current_frequency = -1;
|
|
@@ -568,9 +735,33 @@ error:
|
|
|
return NULL;
|
|
|
}
|
|
|
|
|
|
-static struct dvb_frontend_ops lgdt330x_ops = {
|
|
|
+static struct dvb_frontend_ops lgdt3302_ops = {
|
|
|
+ .info = {
|
|
|
+ .name= "LG Electronics LGDT3302 VSB/QAM Frontend",
|
|
|
+ .type = FE_ATSC,
|
|
|
+ .frequency_min= 54000000,
|
|
|
+ .frequency_max= 858000000,
|
|
|
+ .frequency_stepsize= 62500,
|
|
|
+ /* Symbol rate is for all VSB modes need to check QAM */
|
|
|
+ .symbol_rate_min = 10762000,
|
|
|
+ .symbol_rate_max = 10762000,
|
|
|
+ .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
|
|
|
+ },
|
|
|
+ .init = lgdt330x_init,
|
|
|
+ .set_frontend = lgdt330x_set_parameters,
|
|
|
+ .get_frontend = lgdt330x_get_frontend,
|
|
|
+ .get_tune_settings = lgdt330x_get_tune_settings,
|
|
|
+ .read_status = lgdt3302_read_status,
|
|
|
+ .read_ber = lgdt330x_read_ber,
|
|
|
+ .read_signal_strength = lgdt330x_read_signal_strength,
|
|
|
+ .read_snr = lgdt3302_read_snr,
|
|
|
+ .read_ucblocks = lgdt330x_read_ucblocks,
|
|
|
+ .release = lgdt330x_release,
|
|
|
+};
|
|
|
+
|
|
|
+static struct dvb_frontend_ops lgdt3303_ops = {
|
|
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.info = {
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- .name= "LG Electronics lgdt330x VSB/QAM Frontend",
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+ .name= "LG Electronics LGDT3303 VSB/QAM Frontend",
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.type = FE_ATSC,
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.frequency_min= 54000000,
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.frequency_max= 858000000,
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@@ -584,15 +775,15 @@ static struct dvb_frontend_ops lgdt330x_ops = {
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.set_frontend = lgdt330x_set_parameters,
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.get_frontend = lgdt330x_get_frontend,
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.get_tune_settings = lgdt330x_get_tune_settings,
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- .read_status = lgdt330x_read_status,
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+ .read_status = lgdt3303_read_status,
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.read_ber = lgdt330x_read_ber,
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.read_signal_strength = lgdt330x_read_signal_strength,
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- .read_snr = lgdt330x_read_snr,
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+ .read_snr = lgdt3303_read_snr,
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.read_ucblocks = lgdt330x_read_ucblocks,
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.release = lgdt330x_release,
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};
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-MODULE_DESCRIPTION("lgdt330x [DViCO FusionHDTV 3 Gold] (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
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+MODULE_DESCRIPTION("LGDT330X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
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MODULE_AUTHOR("Wilson Michaels");
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MODULE_LICENSE("GPL");
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@@ -601,6 +792,5 @@ EXPORT_SYMBOL(lgdt330x_attach);
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/*
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* Local variables:
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* c-basic-offset: 8
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- * compile-command: "make DVB=1"
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* End:
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*/
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