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@@ -241,8 +241,8 @@ static int spear_smi_read_sr(struct spear_smi *dev, u32 bank)
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/* copy dev->status (lower 16 bits) in order to release lock */
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if (ret > 0)
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ret = dev->status & 0xffff;
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- else
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- ret = -EIO;
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+ else if (ret == 0)
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+ ret = -ETIMEDOUT;
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/* restore the ctrl regs state */
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writel(ctrlreg1, dev->io_base + SMI_CR1);
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@@ -270,16 +270,19 @@ static int spear_smi_wait_till_ready(struct spear_smi *dev, u32 bank,
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finish = jiffies + timeout;
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do {
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status = spear_smi_read_sr(dev, bank);
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- if (status < 0)
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- continue; /* try till timeout */
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- else if (!(status & SR_WIP))
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+ if (status < 0) {
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+ if (status == -ETIMEDOUT)
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+ continue; /* try till finish */
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+ return status;
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+ } else if (!(status & SR_WIP)) {
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return 0;
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+ }
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cond_resched();
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} while (!time_after_eq(jiffies, finish));
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dev_err(&dev->pdev->dev, "smi controller is busy, timeout\n");
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- return status;
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+ return -EBUSY;
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}
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/**
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@@ -395,11 +398,11 @@ static int spear_smi_write_enable(struct spear_smi *dev, u32 bank)
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writel(ctrlreg1, dev->io_base + SMI_CR1);
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writel(0, dev->io_base + SMI_CR2);
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- if (ret <= 0) {
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+ if (ret == 0) {
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ret = -EIO;
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dev_err(&dev->pdev->dev,
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"smi controller failed on write enable\n");
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- } else {
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+ } else if (ret > 0) {
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/* check whether write mode status is set for required bank */
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if (dev->status & (1 << (bank + WM_SHIFT)))
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ret = 0;
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@@ -466,10 +469,10 @@ static int spear_smi_erase_sector(struct spear_smi *dev,
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ret = wait_event_interruptible_timeout(dev->cmd_complete,
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dev->status & TFF, SMI_CMD_TIMEOUT);
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- if (ret <= 0) {
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+ if (ret == 0) {
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ret = -EIO;
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dev_err(&dev->pdev->dev, "sector erase failed\n");
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- } else
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+ } else if (ret > 0)
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ret = 0; /* success */
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/* restore ctrl regs */
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