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@@ -17,7 +17,7 @@ config CPU_ARM610
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select CPU_CP15_MMU
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select CPU_COPY_V3 if MMU
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select CPU_TLB_V3 if MMU
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- select CPU_PABRT_NOIFAR
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+ select CPU_PABRT_LEGACY
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help
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The ARM610 is the successor to the ARM3 processor
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and was produced by VLSI Technology Inc.
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@@ -31,7 +31,7 @@ config CPU_ARM7TDMI
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depends on !MMU
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select CPU_32v4T
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select CPU_ABRT_LV4T
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- select CPU_PABRT_NOIFAR
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+ select CPU_PABRT_LEGACY
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select CPU_CACHE_V4
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help
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A 32-bit RISC microprocessor based on the ARM7 processor core
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@@ -49,7 +49,7 @@ config CPU_ARM710
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select CPU_CP15_MMU
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select CPU_COPY_V3 if MMU
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select CPU_TLB_V3 if MMU
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- select CPU_PABRT_NOIFAR
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+ select CPU_PABRT_LEGACY
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help
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A 32-bit RISC microprocessor based on the ARM7 processor core
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designed by Advanced RISC Machines Ltd. The ARM710 is the
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@@ -64,7 +64,7 @@ config CPU_ARM720T
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bool "Support ARM720T processor" if ARCH_INTEGRATOR
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select CPU_32v4T
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select CPU_ABRT_LV4T
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- select CPU_PABRT_NOIFAR
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+ select CPU_PABRT_LEGACY
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select CPU_CACHE_V4
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select CPU_CACHE_VIVT
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select CPU_CP15_MMU
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@@ -83,7 +83,7 @@ config CPU_ARM740T
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depends on !MMU
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select CPU_32v4T
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select CPU_ABRT_LV4T
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- select CPU_PABRT_NOIFAR
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+ select CPU_PABRT_LEGACY
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select CPU_CACHE_V3 # although the core is v4t
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select CPU_CP15_MPU
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help
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@@ -100,7 +100,7 @@ config CPU_ARM9TDMI
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depends on !MMU
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select CPU_32v4T
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select CPU_ABRT_NOMMU
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- select CPU_PABRT_NOIFAR
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+ select CPU_PABRT_LEGACY
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select CPU_CACHE_V4
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help
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A 32-bit RISC microprocessor based on the ARM9 processor core
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@@ -114,7 +114,7 @@ config CPU_ARM920T
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bool "Support ARM920T processor" if ARCH_INTEGRATOR
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select CPU_32v4T
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select CPU_ABRT_EV4T
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- select CPU_PABRT_NOIFAR
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+ select CPU_PABRT_LEGACY
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select CPU_CACHE_V4WT
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select CPU_CACHE_VIVT
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select CPU_CP15_MMU
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@@ -135,7 +135,7 @@ config CPU_ARM922T
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bool "Support ARM922T processor" if ARCH_INTEGRATOR
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select CPU_32v4T
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select CPU_ABRT_EV4T
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- select CPU_PABRT_NOIFAR
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+ select CPU_PABRT_LEGACY
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select CPU_CACHE_V4WT
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select CPU_CACHE_VIVT
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select CPU_CP15_MMU
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@@ -154,7 +154,7 @@ config CPU_ARM925T
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bool "Support ARM925T processor" if ARCH_OMAP1
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select CPU_32v4T
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select CPU_ABRT_EV4T
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- select CPU_PABRT_NOIFAR
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+ select CPU_PABRT_LEGACY
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select CPU_CACHE_V4WT
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select CPU_CACHE_VIVT
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select CPU_CP15_MMU
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@@ -173,7 +173,7 @@ config CPU_ARM926T
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bool "Support ARM926T processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB
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select CPU_32v5
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select CPU_ABRT_EV5TJ
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- select CPU_PABRT_NOIFAR
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+ select CPU_PABRT_LEGACY
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select CPU_CACHE_VIVT
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select CPU_CP15_MMU
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select CPU_COPY_V4WB if MMU
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@@ -191,7 +191,7 @@ config CPU_FA526
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bool
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select CPU_32v4
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select CPU_ABRT_EV4
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- select CPU_PABRT_NOIFAR
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+ select CPU_PABRT_LEGACY
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select CPU_CACHE_VIVT
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select CPU_CP15_MMU
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select CPU_CACHE_FA
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@@ -210,7 +210,7 @@ config CPU_ARM940T
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depends on !MMU
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select CPU_32v4T
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select CPU_ABRT_NOMMU
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- select CPU_PABRT_NOIFAR
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+ select CPU_PABRT_LEGACY
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select CPU_CACHE_VIVT
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select CPU_CP15_MPU
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help
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@@ -228,7 +228,7 @@ config CPU_ARM946E
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depends on !MMU
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select CPU_32v5
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select CPU_ABRT_NOMMU
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- select CPU_PABRT_NOIFAR
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+ select CPU_PABRT_LEGACY
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select CPU_CACHE_VIVT
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select CPU_CP15_MPU
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help
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@@ -244,7 +244,7 @@ config CPU_ARM1020
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bool "Support ARM1020T (rev 0) processor" if ARCH_INTEGRATOR
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select CPU_32v5
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select CPU_ABRT_EV4T
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- select CPU_PABRT_NOIFAR
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+ select CPU_PABRT_LEGACY
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select CPU_CACHE_V4WT
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select CPU_CACHE_VIVT
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select CPU_CP15_MMU
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@@ -262,7 +262,7 @@ config CPU_ARM1020E
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bool "Support ARM1020E processor" if ARCH_INTEGRATOR
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select CPU_32v5
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select CPU_ABRT_EV4T
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- select CPU_PABRT_NOIFAR
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+ select CPU_PABRT_LEGACY
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select CPU_CACHE_V4WT
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select CPU_CACHE_VIVT
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select CPU_CP15_MMU
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@@ -275,7 +275,7 @@ config CPU_ARM1022
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bool "Support ARM1022E processor" if ARCH_INTEGRATOR
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select CPU_32v5
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select CPU_ABRT_EV4T
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- select CPU_PABRT_NOIFAR
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+ select CPU_PABRT_LEGACY
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select CPU_CACHE_VIVT
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select CPU_CP15_MMU
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select CPU_COPY_V4WB if MMU # can probably do better
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@@ -293,7 +293,7 @@ config CPU_ARM1026
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bool "Support ARM1026EJ-S processor" if ARCH_INTEGRATOR
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select CPU_32v5
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select CPU_ABRT_EV5T # But need Jazelle, but EV5TJ ignores bit 10
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- select CPU_PABRT_NOIFAR
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+ select CPU_PABRT_LEGACY
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select CPU_CACHE_VIVT
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select CPU_CP15_MMU
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select CPU_COPY_V4WB if MMU # can probably do better
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@@ -311,7 +311,7 @@ config CPU_SA110
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select CPU_32v3 if ARCH_RPC
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select CPU_32v4 if !ARCH_RPC
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select CPU_ABRT_EV4
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- select CPU_PABRT_NOIFAR
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+ select CPU_PABRT_LEGACY
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select CPU_CACHE_V4WB
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select CPU_CACHE_VIVT
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select CPU_CP15_MMU
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@@ -331,7 +331,7 @@ config CPU_SA1100
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bool
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select CPU_32v4
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select CPU_ABRT_EV4
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- select CPU_PABRT_NOIFAR
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+ select CPU_PABRT_LEGACY
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select CPU_CACHE_V4WB
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select CPU_CACHE_VIVT
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select CPU_CP15_MMU
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@@ -342,7 +342,7 @@ config CPU_XSCALE
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bool
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select CPU_32v5
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select CPU_ABRT_EV5T
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- select CPU_PABRT_NOIFAR
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+ select CPU_PABRT_LEGACY
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select CPU_CACHE_VIVT
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select CPU_CP15_MMU
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select CPU_TLB_V4WBI if MMU
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@@ -352,7 +352,7 @@ config CPU_XSC3
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bool
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select CPU_32v5
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select CPU_ABRT_EV5T
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- select CPU_PABRT_NOIFAR
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+ select CPU_PABRT_LEGACY
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select CPU_CACHE_VIVT
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select CPU_CP15_MMU
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select CPU_TLB_V4WBI if MMU
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@@ -363,7 +363,7 @@ config CPU_MOHAWK
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bool
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select CPU_32v5
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select CPU_ABRT_EV5T
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- select CPU_PABRT_NOIFAR
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+ select CPU_PABRT_LEGACY
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select CPU_CACHE_VIVT
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select CPU_CP15_MMU
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select CPU_TLB_V4WBI if MMU
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@@ -374,7 +374,7 @@ config CPU_FEROCEON
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bool
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select CPU_32v5
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select CPU_ABRT_EV5T
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- select CPU_PABRT_NOIFAR
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+ select CPU_PABRT_LEGACY
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select CPU_CACHE_VIVT
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select CPU_CP15_MMU
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select CPU_COPY_FEROCEON if MMU
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@@ -394,7 +394,7 @@ config CPU_V6
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bool "Support ARM V6 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX
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select CPU_32v6
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select CPU_ABRT_EV6
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- select CPU_PABRT_NOIFAR
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+ select CPU_PABRT_V6
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select CPU_CACHE_V6
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select CPU_CACHE_VIPT
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select CPU_CP15_MMU
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@@ -420,7 +420,7 @@ config CPU_V7
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select CPU_32v6K
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select CPU_32v7
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select CPU_ABRT_EV7
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- select CPU_PABRT_IFAR
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+ select CPU_PABRT_V7
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select CPU_CACHE_V7
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select CPU_CACHE_VIPT
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select CPU_CP15_MMU
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@@ -482,10 +482,13 @@ config CPU_ABRT_EV6
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config CPU_ABRT_EV7
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bool
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-config CPU_PABRT_IFAR
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+config CPU_PABRT_LEGACY
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bool
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-config CPU_PABRT_NOIFAR
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+config CPU_PABRT_V6
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+ bool
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+
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+config CPU_PABRT_V7
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bool
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# The cache model
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