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@@ -77,66 +77,66 @@ static uint32_t extract_dc(unsigned short addr, int data);
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static inline void breakout_errctl(unsigned int val)
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{
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if (val & CP0_ERRCTL_RECOVERABLE)
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- prom_printf(" recoverable");
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+ printk(" recoverable");
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if (val & CP0_ERRCTL_DCACHE)
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- prom_printf(" dcache");
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+ printk(" dcache");
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if (val & CP0_ERRCTL_ICACHE)
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- prom_printf(" icache");
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+ printk(" icache");
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if (val & CP0_ERRCTL_MULTIBUS)
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- prom_printf(" multiple-buserr");
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- prom_printf("\n");
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+ printk(" multiple-buserr");
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+ printk("\n");
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}
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static inline void breakout_cerri(unsigned int val)
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{
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if (val & CP0_CERRI_TAG_PARITY)
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- prom_printf(" tag-parity");
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+ printk(" tag-parity");
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if (val & CP0_CERRI_DATA_PARITY)
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- prom_printf(" data-parity");
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+ printk(" data-parity");
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if (val & CP0_CERRI_EXTERNAL)
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- prom_printf(" external");
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- prom_printf("\n");
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+ printk(" external");
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+ printk("\n");
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}
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static inline void breakout_cerrd(unsigned int val)
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{
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switch (val & CP0_CERRD_CAUSES) {
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case CP0_CERRD_LOAD:
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- prom_printf(" load,");
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+ printk(" load,");
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break;
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case CP0_CERRD_STORE:
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- prom_printf(" store,");
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+ printk(" store,");
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break;
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case CP0_CERRD_FILLWB:
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- prom_printf(" fill/wb,");
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+ printk(" fill/wb,");
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break;
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case CP0_CERRD_COHERENCY:
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- prom_printf(" coherency,");
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+ printk(" coherency,");
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break;
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case CP0_CERRD_DUPTAG:
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- prom_printf(" duptags,");
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+ printk(" duptags,");
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break;
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default:
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- prom_printf(" NO CAUSE,");
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+ printk(" NO CAUSE,");
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break;
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}
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if (!(val & CP0_CERRD_TYPES))
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- prom_printf(" NO TYPE");
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+ printk(" NO TYPE");
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else {
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if (val & CP0_CERRD_MULTIPLE)
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- prom_printf(" multi-err");
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+ printk(" multi-err");
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if (val & CP0_CERRD_TAG_STATE)
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- prom_printf(" tag-state");
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+ printk(" tag-state");
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if (val & CP0_CERRD_TAG_ADDRESS)
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- prom_printf(" tag-address");
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+ printk(" tag-address");
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if (val & CP0_CERRD_DATA_SBE)
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- prom_printf(" data-SBE");
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+ printk(" data-SBE");
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if (val & CP0_CERRD_DATA_DBE)
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- prom_printf(" data-DBE");
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+ printk(" data-DBE");
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if (val & CP0_CERRD_EXTERNAL)
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- prom_printf(" external");
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+ printk(" external");
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}
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- prom_printf("\n");
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+ printk("\n");
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}
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#ifndef CONFIG_SIBYTE_BUS_WATCHER
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@@ -157,18 +157,18 @@ static void check_bus_watcher(void)
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l2_tag = in64(IO_SPACE_BASE | A_L2_ECC_TAG);
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#endif
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memio_err = csr_in32(IOADDR(A_BUS_MEM_IO_ERRORS));
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- prom_printf("Bus watcher error counters: %08x %08x\n", l2_err, memio_err);
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- prom_printf("\nLast recorded signature:\n");
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- prom_printf("Request %02x from %d, answered by %d with Dcode %d\n",
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+ printk("Bus watcher error counters: %08x %08x\n", l2_err, memio_err);
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+ printk("\nLast recorded signature:\n");
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+ printk("Request %02x from %d, answered by %d with Dcode %d\n",
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(unsigned int)(G_SCD_BERR_TID(status) & 0x3f),
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(int)(G_SCD_BERR_TID(status) >> 6),
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(int)G_SCD_BERR_RID(status),
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(int)G_SCD_BERR_DCODE(status));
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#ifdef DUMP_L2_ECC_TAG_ON_ERROR
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- prom_printf("Last L2 tag w/ bad ECC: %016llx\n", l2_tag);
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+ printk("Last L2 tag w/ bad ECC: %016llx\n", l2_tag);
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#endif
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} else {
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- prom_printf("Bus watcher indicates no error\n");
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+ printk("Bus watcher indicates no error\n");
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}
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}
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#else
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@@ -187,11 +187,11 @@ asmlinkage void sb1_cache_error(void)
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#else
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csr_out32(M_SCD_TRACE_CFG_FREEZE, IO_SPACE_BASE | A_SCD_TRACE_CFG);
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#endif
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- prom_printf("Trace buffer frozen\n");
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+ printk("Trace buffer frozen\n");
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#endif
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- prom_printf("Cache error exception on CPU %x:\n",
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- (read_c0_prid() >> 25) & 0x7);
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+ printk("Cache error exception on CPU %x:\n",
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+ (read_c0_prid() >> 25) & 0x7);
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__asm__ __volatile__ (
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" .set push\n\t"
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@@ -209,43 +209,43 @@ asmlinkage void sb1_cache_error(void)
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"=r" (dpahi), "=r" (dpalo), "=r" (eepc));
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cerr_dpa = (((uint64_t)dpahi) << 32) | dpalo;
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- prom_printf(" c0_errorepc == %08x\n", eepc);
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- prom_printf(" c0_errctl == %08x", errctl);
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+ printk(" c0_errorepc == %08x\n", eepc);
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+ printk(" c0_errctl == %08x", errctl);
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breakout_errctl(errctl);
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if (errctl & CP0_ERRCTL_ICACHE) {
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- prom_printf(" c0_cerr_i == %08x", cerr_i);
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+ printk(" c0_cerr_i == %08x", cerr_i);
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breakout_cerri(cerr_i);
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if (CP0_CERRI_IDX_VALID(cerr_i)) {
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/* Check index of EPC, allowing for delay slot */
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if (((eepc & SB1_CACHE_INDEX_MASK) != (cerr_i & SB1_CACHE_INDEX_MASK)) &&
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((eepc & SB1_CACHE_INDEX_MASK) != ((cerr_i & SB1_CACHE_INDEX_MASK) - 4)))
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- prom_printf(" cerr_i idx doesn't match eepc\n");
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+ printk(" cerr_i idx doesn't match eepc\n");
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else {
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res = extract_ic(cerr_i & SB1_CACHE_INDEX_MASK,
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(cerr_i & CP0_CERRI_DATA) != 0);
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if (!(res & cerr_i))
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- prom_printf("...didn't see indicated icache problem\n");
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+ printk("...didn't see indicated icache problem\n");
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}
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}
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}
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if (errctl & CP0_ERRCTL_DCACHE) {
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- prom_printf(" c0_cerr_d == %08x", cerr_d);
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+ printk(" c0_cerr_d == %08x", cerr_d);
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breakout_cerrd(cerr_d);
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if (CP0_CERRD_DPA_VALID(cerr_d)) {
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- prom_printf(" c0_cerr_dpa == %010llx\n", cerr_dpa);
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+ printk(" c0_cerr_dpa == %010llx\n", cerr_dpa);
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if (!CP0_CERRD_IDX_VALID(cerr_d)) {
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res = extract_dc(cerr_dpa & SB1_CACHE_INDEX_MASK,
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(cerr_d & CP0_CERRD_DATA) != 0);
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if (!(res & cerr_d))
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- prom_printf("...didn't see indicated dcache problem\n");
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+ printk("...didn't see indicated dcache problem\n");
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} else {
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if ((cerr_dpa & SB1_CACHE_INDEX_MASK) != (cerr_d & SB1_CACHE_INDEX_MASK))
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- prom_printf(" cerr_d idx doesn't match cerr_dpa\n");
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+ printk(" cerr_d idx doesn't match cerr_dpa\n");
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else {
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res = extract_dc(cerr_d & SB1_CACHE_INDEX_MASK,
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(cerr_d & CP0_CERRD_DATA) != 0);
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if (!(res & cerr_d))
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- prom_printf("...didn't see indicated problem\n");
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+ printk("...didn't see indicated problem\n");
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}
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}
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}
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@@ -334,7 +334,7 @@ static uint32_t extract_ic(unsigned short addr, int data)
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uint8_t lru;
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int res = 0;
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- prom_printf("Icache index 0x%04x ", addr);
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+ printk("Icache index 0x%04x ", addr);
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for (way = 0; way < 4; way++) {
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/* Index-load-tag-I */
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__asm__ __volatile__ (
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@@ -354,7 +354,7 @@ static uint32_t extract_ic(unsigned short addr, int data)
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taglo = ((unsigned long long)taglohi << 32) | taglolo;
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if (way == 0) {
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lru = (taghi >> 14) & 0xff;
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- prom_printf("[Bank %d Set 0x%02x] LRU > %d %d %d %d > MRU\n",
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+ printk("[Bank %d Set 0x%02x] LRU > %d %d %d %d > MRU\n",
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((addr >> 5) & 0x3), /* bank */
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((addr >> 7) & 0x3f), /* index */
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(lru & 0x3),
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@@ -369,19 +369,19 @@ static uint32_t extract_ic(unsigned short addr, int data)
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if (valid) {
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tlo_tmp = taglo & 0xfff3ff;
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if (((taglo >> 10) & 1) ^ range_parity(tlo_tmp, 23, 0)) {
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- prom_printf(" ** bad parity in VTag0/G/ASID\n");
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+ printk(" ** bad parity in VTag0/G/ASID\n");
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res |= CP0_CERRI_TAG_PARITY;
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}
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if (((taglo >> 11) & 1) ^ range_parity(taglo, 63, 24)) {
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- prom_printf(" ** bad parity in R/VTag1\n");
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+ printk(" ** bad parity in R/VTag1\n");
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res |= CP0_CERRI_TAG_PARITY;
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}
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}
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if (valid ^ ((taghi >> 27) & 1)) {
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- prom_printf(" ** bad parity for valid bit\n");
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+ printk(" ** bad parity for valid bit\n");
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res |= CP0_CERRI_TAG_PARITY;
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}
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- prom_printf(" %d [VA %016llx] [Vld? %d] raw tags: %08X-%016llX\n",
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+ printk(" %d [VA %016llx] [Vld? %d] raw tags: %08X-%016llX\n",
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way, va, valid, taghi, taglo);
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if (data) {
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@@ -407,21 +407,21 @@ static uint32_t extract_ic(unsigned short addr, int data)
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: "r" ((way << 13) | addr | (offset << 3)));
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predecode = (datahi >> 8) & 0xff;
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if (((datahi >> 16) & 1) != (uint32_t)range_parity(predecode, 7, 0)) {
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- prom_printf(" ** bad parity in predecode\n");
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+ printk(" ** bad parity in predecode\n");
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res |= CP0_CERRI_DATA_PARITY;
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}
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/* XXXKW should/could check predecode bits themselves */
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if (((datahi >> 4) & 0xf) ^ inst_parity(insta)) {
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- prom_printf(" ** bad parity in instruction a\n");
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+ printk(" ** bad parity in instruction a\n");
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res |= CP0_CERRI_DATA_PARITY;
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}
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if ((datahi & 0xf) ^ inst_parity(instb)) {
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- prom_printf(" ** bad parity in instruction b\n");
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+ printk(" ** bad parity in instruction b\n");
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res |= CP0_CERRI_DATA_PARITY;
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}
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- prom_printf(" %05X-%08X%08X", datahi, insta, instb);
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+ printk(" %05X-%08X%08X", datahi, insta, instb);
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}
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- prom_printf("\n");
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+ printk("\n");
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}
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}
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return res;
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@@ -489,7 +489,7 @@ static uint32_t extract_dc(unsigned short addr, int data)
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uint8_t ecc, lru;
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int res = 0;
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- prom_printf("Dcache index 0x%04x ", addr);
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+ printk("Dcache index 0x%04x ", addr);
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for (way = 0; way < 4; way++) {
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__asm__ __volatile__ (
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" .set push\n\t"
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@@ -509,7 +509,7 @@ static uint32_t extract_dc(unsigned short addr, int data)
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pa = (taglo & 0xFFFFFFE000ULL) | addr;
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if (way == 0) {
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lru = (taghi >> 14) & 0xff;
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- prom_printf("[Bank %d Set 0x%02x] LRU > %d %d %d %d > MRU\n",
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+ printk("[Bank %d Set 0x%02x] LRU > %d %d %d %d > MRU\n",
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((addr >> 11) & 0x2) | ((addr >> 5) & 1), /* bank */
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((addr >> 6) & 0x3f), /* index */
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(lru & 0x3),
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@@ -519,15 +519,15 @@ static uint32_t extract_dc(unsigned short addr, int data)
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}
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state = (taghi >> 25) & 0x1f;
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valid = DC_TAG_VALID(state);
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- prom_printf(" %d [PA %010llx] [state %s (%02x)] raw tags: %08X-%016llX\n",
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+ printk(" %d [PA %010llx] [state %s (%02x)] raw tags: %08X-%016llX\n",
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way, pa, dc_state_str(state), state, taghi, taglo);
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if (valid) {
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if (((taglo >> 11) & 1) ^ range_parity(taglo, 39, 26)) {
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- prom_printf(" ** bad parity in PTag1\n");
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+ printk(" ** bad parity in PTag1\n");
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res |= CP0_CERRD_TAG_ADDRESS;
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}
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if (((taglo >> 10) & 1) ^ range_parity(taglo, 25, 13)) {
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- prom_printf(" ** bad parity in PTag0\n");
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+ printk(" ** bad parity in PTag0\n");
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res |= CP0_CERRD_TAG_ADDRESS;
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}
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} else {
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@@ -567,13 +567,13 @@ static uint32_t extract_dc(unsigned short addr, int data)
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}
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res |= (bits == 1) ? CP0_CERRD_DATA_SBE : CP0_CERRD_DATA_DBE;
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}
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- prom_printf(" %02X-%016llX", datahi, datalo);
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+ printk(" %02X-%016llX", datahi, datalo);
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}
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- prom_printf("\n");
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+ printk("\n");
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if (bad_ecc)
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- prom_printf(" dwords w/ bad ECC: %d %d %d %d\n",
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- !!(bad_ecc & 8), !!(bad_ecc & 4),
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- !!(bad_ecc & 2), !!(bad_ecc & 1));
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+ printk(" dwords w/ bad ECC: %d %d %d %d\n",
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+ !!(bad_ecc & 8), !!(bad_ecc & 4),
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+ !!(bad_ecc & 2), !!(bad_ecc & 1));
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}
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}
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return res;
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