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@@ -78,7 +78,7 @@ static int dma40_memcpy_channels[] = {
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/* Default configuration for physcial memcpy */
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struct stedma40_chan_cfg dma40_memcpy_conf_phy = {
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.mode = STEDMA40_MODE_PHYSICAL,
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- .dir = STEDMA40_MEM_TO_MEM,
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+ .dir = DMA_MEM_TO_MEM,
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.src_info.data_width = STEDMA40_BYTE_WIDTH,
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.src_info.psize = STEDMA40_PSIZE_PHY_1,
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@@ -92,7 +92,7 @@ struct stedma40_chan_cfg dma40_memcpy_conf_phy = {
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/* Default configuration for logical memcpy */
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struct stedma40_chan_cfg dma40_memcpy_conf_log = {
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.mode = STEDMA40_MODE_LOGICAL,
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- .dir = STEDMA40_MEM_TO_MEM,
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+ .dir = DMA_MEM_TO_MEM,
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.src_info.data_width = STEDMA40_BYTE_WIDTH,
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.src_info.psize = STEDMA40_PSIZE_LOG_1,
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@@ -843,7 +843,7 @@ static void d40_log_lli_to_lcxa(struct d40_chan *chan, struct d40_desc *desc)
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* that uses linked lists.
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*/
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if (!(chan->phy_chan->use_soft_lli &&
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- chan->dma_cfg.dir == STEDMA40_PERIPH_TO_MEM))
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+ chan->dma_cfg.dir == DMA_DEV_TO_MEM))
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curr_lcla = d40_lcla_alloc_one(chan, desc);
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first_lcla = curr_lcla;
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@@ -1311,12 +1311,12 @@ static void d40_config_set_event(struct d40_chan *d40c,
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u32 event = D40_TYPE_TO_EVENT(d40c->dma_cfg.dev_type);
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/* Enable event line connected to device (or memcpy) */
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- if ((d40c->dma_cfg.dir == STEDMA40_PERIPH_TO_MEM) ||
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- (d40c->dma_cfg.dir == STEDMA40_PERIPH_TO_PERIPH))
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+ if ((d40c->dma_cfg.dir == DMA_DEV_TO_MEM) ||
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+ (d40c->dma_cfg.dir == DMA_DEV_TO_DEV))
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__d40_config_set_event(d40c, event_type, event,
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D40_CHAN_REG_SSLNK);
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- if (d40c->dma_cfg.dir != STEDMA40_PERIPH_TO_MEM)
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+ if (d40c->dma_cfg.dir != DMA_DEV_TO_MEM)
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__d40_config_set_event(d40c, event_type, event,
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D40_CHAN_REG_SDLNK);
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}
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@@ -1774,7 +1774,7 @@ static int d40_validate_conf(struct d40_chan *d40c,
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res = -EINVAL;
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}
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- if (conf->dir == STEDMA40_PERIPH_TO_PERIPH) {
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+ if (conf->dir == DMA_DEV_TO_DEV) {
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/*
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* DMAC HW supports it. Will be added to this driver,
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* in case any dma client requires it.
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@@ -1905,11 +1905,11 @@ static int d40_allocate_channel(struct d40_chan *d40c, bool *first_phy_user)
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phys = d40c->base->phy_res;
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num_phy_chans = d40c->base->num_phy_chans;
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- if (d40c->dma_cfg.dir == STEDMA40_PERIPH_TO_MEM) {
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+ if (d40c->dma_cfg.dir == DMA_DEV_TO_MEM) {
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log_num = 2 * dev_type;
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is_src = true;
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- } else if (d40c->dma_cfg.dir == STEDMA40_MEM_TO_PERIPH ||
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- d40c->dma_cfg.dir == STEDMA40_MEM_TO_MEM) {
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+ } else if (d40c->dma_cfg.dir == DMA_MEM_TO_DEV ||
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+ d40c->dma_cfg.dir == DMA_MEM_TO_MEM) {
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/* dst event lines are used for logical memcpy */
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log_num = 2 * dev_type + 1;
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is_src = false;
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@@ -1920,7 +1920,7 @@ static int d40_allocate_channel(struct d40_chan *d40c, bool *first_phy_user)
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event_line = D40_TYPE_TO_EVENT(dev_type);
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if (!is_log) {
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- if (d40c->dma_cfg.dir == STEDMA40_MEM_TO_MEM) {
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+ if (d40c->dma_cfg.dir == DMA_MEM_TO_MEM) {
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/* Find physical half channel */
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if (d40c->dma_cfg.use_fixed_channel) {
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i = d40c->dma_cfg.phy_channel;
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@@ -2068,10 +2068,10 @@ static int d40_free_dma(struct d40_chan *d40c)
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return -EINVAL;
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}
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- if (d40c->dma_cfg.dir == STEDMA40_MEM_TO_PERIPH ||
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- d40c->dma_cfg.dir == STEDMA40_MEM_TO_MEM)
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+ if (d40c->dma_cfg.dir == DMA_MEM_TO_DEV ||
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+ d40c->dma_cfg.dir == DMA_MEM_TO_MEM)
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is_src = false;
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- else if (d40c->dma_cfg.dir == STEDMA40_PERIPH_TO_MEM)
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+ else if (d40c->dma_cfg.dir == DMA_DEV_TO_MEM)
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is_src = true;
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else {
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chan_err(d40c, "Unknown direction\n");
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@@ -2133,10 +2133,10 @@ static bool d40_is_paused(struct d40_chan *d40c)
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goto _exit;
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}
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- if (d40c->dma_cfg.dir == STEDMA40_MEM_TO_PERIPH ||
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- d40c->dma_cfg.dir == STEDMA40_MEM_TO_MEM) {
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+ if (d40c->dma_cfg.dir == DMA_MEM_TO_DEV ||
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+ d40c->dma_cfg.dir == DMA_MEM_TO_MEM) {
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status = readl(chanbase + D40_CHAN_REG_SDLNK);
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- } else if (d40c->dma_cfg.dir == STEDMA40_PERIPH_TO_MEM) {
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+ } else if (d40c->dma_cfg.dir == DMA_DEV_TO_MEM) {
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status = readl(chanbase + D40_CHAN_REG_SSLNK);
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} else {
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chan_err(d40c, "Unknown direction\n");
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@@ -2387,12 +2387,12 @@ static void d40_set_prio_realtime(struct d40_chan *d40c)
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if (d40c->base->rev < 3)
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return;
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- if ((d40c->dma_cfg.dir == STEDMA40_PERIPH_TO_MEM) ||
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- (d40c->dma_cfg.dir == STEDMA40_PERIPH_TO_PERIPH))
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+ if ((d40c->dma_cfg.dir == DMA_DEV_TO_MEM) ||
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+ (d40c->dma_cfg.dir == DMA_DEV_TO_DEV))
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__d40_set_prio_rt(d40c, d40c->dma_cfg.dev_type, true);
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- if ((d40c->dma_cfg.dir == STEDMA40_MEM_TO_PERIPH) ||
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- (d40c->dma_cfg.dir == STEDMA40_PERIPH_TO_PERIPH))
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+ if ((d40c->dma_cfg.dir == DMA_MEM_TO_DEV) ||
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+ (d40c->dma_cfg.dir == DMA_DEV_TO_DEV))
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__d40_set_prio_rt(d40c, d40c->dma_cfg.dev_type, false);
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}
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@@ -2423,11 +2423,11 @@ static struct dma_chan *d40_xlate(struct of_phandle_args *dma_spec,
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switch (D40_DT_FLAGS_DIR(flags)) {
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case 0:
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- cfg.dir = STEDMA40_MEM_TO_PERIPH;
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+ cfg.dir = DMA_MEM_TO_DEV;
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cfg.dst_info.big_endian = D40_DT_FLAGS_BIG_ENDIAN(flags);
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break;
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case 1:
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- cfg.dir = STEDMA40_PERIPH_TO_MEM;
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+ cfg.dir = DMA_DEV_TO_MEM;
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cfg.src_info.big_endian = D40_DT_FLAGS_BIG_ENDIAN(flags);
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break;
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}
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@@ -2473,7 +2473,7 @@ static int d40_alloc_chan_resources(struct dma_chan *chan)
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d40_set_prio_realtime(d40c);
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if (chan_is_logical(d40c)) {
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- if (d40c->dma_cfg.dir == STEDMA40_PERIPH_TO_MEM)
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+ if (d40c->dma_cfg.dir == DMA_DEV_TO_MEM)
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d40c->lcpa = d40c->base->lcpa_base +
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d40c->dma_cfg.dev_type * D40_LCPA_CHAN_SIZE;
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else
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@@ -2746,12 +2746,12 @@ static int d40_set_runtime_config(struct dma_chan *chan,
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if (config->direction == DMA_DEV_TO_MEM) {
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config_addr = config->src_addr;
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- if (cfg->dir != STEDMA40_PERIPH_TO_MEM)
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+ if (cfg->dir != DMA_DEV_TO_MEM)
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dev_dbg(d40c->base->dev,
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"channel was not configured for peripheral "
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"to memory transfer (%d) overriding\n",
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cfg->dir);
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- cfg->dir = STEDMA40_PERIPH_TO_MEM;
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+ cfg->dir = DMA_DEV_TO_MEM;
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/* Configure the memory side */
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if (dst_addr_width == DMA_SLAVE_BUSWIDTH_UNDEFINED)
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@@ -2762,12 +2762,12 @@ static int d40_set_runtime_config(struct dma_chan *chan,
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} else if (config->direction == DMA_MEM_TO_DEV) {
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config_addr = config->dst_addr;
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- if (cfg->dir != STEDMA40_MEM_TO_PERIPH)
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+ if (cfg->dir != DMA_MEM_TO_DEV)
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dev_dbg(d40c->base->dev,
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"channel was not configured for memory "
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"to peripheral transfer (%d) overriding\n",
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cfg->dir);
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- cfg->dir = STEDMA40_MEM_TO_PERIPH;
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+ cfg->dir = DMA_MEM_TO_DEV;
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/* Configure the memory side */
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if (src_addr_width == DMA_SLAVE_BUSWIDTH_UNDEFINED)
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