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e1000: reorder pci-e infor struct

Order pci-e capability struct according to bus/pci bus width ordering
preserving the hard pci spec numbers.

Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Jeff Kirsher 18 年之前
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2bc35c1078
共有 1 個文件被更改,包括 5 次插入3 次删除
  1. 5 3
      drivers/net/e1000/e1000_hw.h

+ 5 - 3
drivers/net/e1000/e1000_hw.h

@@ -128,11 +128,13 @@ typedef enum {
 /* PCI bus widths */
 /* PCI bus widths */
 typedef enum {
 typedef enum {
     e1000_bus_width_unknown = 0,
     e1000_bus_width_unknown = 0,
+    /* These PCIe values should literally match the possible return values
+     * from config space */
+    e1000_bus_width_pciex_1 = 1,
+    e1000_bus_width_pciex_2 = 2,
+    e1000_bus_width_pciex_4 = 4,
     e1000_bus_width_32,
     e1000_bus_width_32,
     e1000_bus_width_64,
     e1000_bus_width_64,
-    e1000_bus_width_pciex_1,
-    e1000_bus_width_pciex_2,
-    e1000_bus_width_pciex_4,
     e1000_bus_width_reserved
     e1000_bus_width_reserved
 } e1000_bus_width;
 } e1000_bus_width;