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@@ -310,7 +310,7 @@ void intel_pmu_lbr_read(void)
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* - in case there is no HW filter
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* - in case the HW filter has errata or limitations
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*/
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-static int intel_pmu_setup_sw_lbr_filter(struct perf_event *event)
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+static void intel_pmu_setup_sw_lbr_filter(struct perf_event *event)
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{
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u64 br_type = event->attr.branch_sample_type;
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int mask = 0;
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@@ -318,11 +318,8 @@ static int intel_pmu_setup_sw_lbr_filter(struct perf_event *event)
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if (br_type & PERF_SAMPLE_BRANCH_USER)
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mask |= X86_BR_USER;
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- if (br_type & PERF_SAMPLE_BRANCH_KERNEL) {
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- if (perf_paranoid_kernel() && !capable(CAP_SYS_ADMIN))
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- return -EACCES;
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+ if (br_type & PERF_SAMPLE_BRANCH_KERNEL)
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mask |= X86_BR_KERNEL;
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- }
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/* we ignore BRANCH_HV here */
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@@ -342,8 +339,6 @@ static int intel_pmu_setup_sw_lbr_filter(struct perf_event *event)
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* be used by fixup code for some CPU
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*/
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event->hw.branch_reg.reg = mask;
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-
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- return 0;
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}
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/*
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@@ -391,9 +386,7 @@ int intel_pmu_setup_lbr_filter(struct perf_event *event)
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/*
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* setup SW LBR filter
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*/
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- ret = intel_pmu_setup_sw_lbr_filter(event);
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- if (ret)
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- return ret;
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+ intel_pmu_setup_sw_lbr_filter(event);
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/*
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* setup HW LBR filter, if any
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