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@@ -9,6 +9,7 @@
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#include <linux/module.h>
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#include <linux/dmaengine.h>
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#include <linux/dma-mapping.h>
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+#include <linux/pm_runtime.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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@@ -73,6 +74,11 @@ struct sirfsoc_dma_chan {
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int mode;
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};
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+struct sirfsoc_dma_regs {
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+ u32 ctrl[SIRFSOC_DMA_CHANNELS];
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+ u32 interrupt_en;
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+};
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+
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struct sirfsoc_dma {
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struct dma_device dma;
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struct tasklet_struct tasklet;
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@@ -81,10 +87,13 @@ struct sirfsoc_dma {
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int irq;
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struct clk *clk;
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bool is_marco;
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+ struct sirfsoc_dma_regs regs_save;
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};
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#define DRV_NAME "sirfsoc_dma"
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+static int sirfsoc_dma_runtime_suspend(struct device *dev);
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+
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/* Convert struct dma_chan to struct sirfsoc_dma_chan */
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static inline
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struct sirfsoc_dma_chan *dma_chan_to_sirfsoc_dma_chan(struct dma_chan *c)
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@@ -393,6 +402,8 @@ static int sirfsoc_dma_alloc_chan_resources(struct dma_chan *chan)
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LIST_HEAD(descs);
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int i;
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+ pm_runtime_get_sync(sdma->dma.dev);
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+
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/* Alloc descriptors for this channel */
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for (i = 0; i < SIRFSOC_DMA_DESCRIPTORS; i++) {
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sdesc = kzalloc(sizeof(*sdesc), GFP_KERNEL);
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@@ -425,6 +436,7 @@ static int sirfsoc_dma_alloc_chan_resources(struct dma_chan *chan)
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static void sirfsoc_dma_free_chan_resources(struct dma_chan *chan)
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{
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struct sirfsoc_dma_chan *schan = dma_chan_to_sirfsoc_dma_chan(chan);
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+ struct sirfsoc_dma *sdma = dma_chan_to_sirfsoc_dma(chan);
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struct sirfsoc_dma_desc *sdesc, *tmp;
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unsigned long flags;
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LIST_HEAD(descs);
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@@ -445,6 +457,8 @@ static void sirfsoc_dma_free_chan_resources(struct dma_chan *chan)
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/* Free descriptors */
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list_for_each_entry_safe(sdesc, tmp, &descs, node)
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kfree(sdesc);
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+
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+ pm_runtime_put(sdma->dma.dev);
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}
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/* Send pending descriptor to hardware */
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@@ -723,14 +737,14 @@ static int sirfsoc_dma_probe(struct platform_device *op)
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tasklet_init(&sdma->tasklet, sirfsoc_dma_tasklet, (unsigned long)sdma);
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- clk_prepare_enable(sdma->clk);
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-
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/* Register DMA engine */
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dev_set_drvdata(dev, sdma);
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+
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ret = dma_async_device_register(dma);
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if (ret)
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goto free_irq;
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+ pm_runtime_enable(&op->dev);
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dev_info(dev, "initialized SIRFSOC DMAC driver\n");
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return 0;
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@@ -747,13 +761,124 @@ static int sirfsoc_dma_remove(struct platform_device *op)
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struct device *dev = &op->dev;
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struct sirfsoc_dma *sdma = dev_get_drvdata(dev);
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- clk_disable_unprepare(sdma->clk);
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dma_async_device_unregister(&sdma->dma);
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free_irq(sdma->irq, sdma);
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irq_dispose_mapping(sdma->irq);
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+ pm_runtime_disable(&op->dev);
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+ if (!pm_runtime_status_suspended(&op->dev))
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+ sirfsoc_dma_runtime_suspend(&op->dev);
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+
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+ return 0;
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+}
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+
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+static int sirfsoc_dma_runtime_suspend(struct device *dev)
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+{
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+ struct sirfsoc_dma *sdma = dev_get_drvdata(dev);
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+
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+ clk_disable_unprepare(sdma->clk);
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+ return 0;
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+}
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+
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+static int sirfsoc_dma_runtime_resume(struct device *dev)
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+{
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+ struct sirfsoc_dma *sdma = dev_get_drvdata(dev);
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+ int ret;
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+
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+ ret = clk_prepare_enable(sdma->clk);
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+ if (ret < 0) {
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+ dev_err(dev, "clk_enable failed: %d\n", ret);
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+ return ret;
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+ }
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+ return 0;
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+}
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+
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+static int sirfsoc_dma_pm_suspend(struct device *dev)
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+{
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+ struct sirfsoc_dma *sdma = dev_get_drvdata(dev);
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+ struct sirfsoc_dma_regs *save = &sdma->regs_save;
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+ struct sirfsoc_dma_desc *sdesc;
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+ struct sirfsoc_dma_chan *schan;
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+ int ch;
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+ int ret;
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+
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+ /*
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+ * if we were runtime-suspended before, resume to enable clock
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+ * before accessing register
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+ */
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+ if (pm_runtime_status_suspended(dev)) {
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+ ret = sirfsoc_dma_runtime_resume(dev);
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+ if (ret < 0)
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+ return ret;
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+ }
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+
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+ /*
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+ * DMA controller will lose all registers while suspending
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+ * so we need to save registers for active channels
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+ */
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+ for (ch = 0; ch < SIRFSOC_DMA_CHANNELS; ch++) {
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+ schan = &sdma->channels[ch];
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+ if (list_empty(&schan->active))
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+ continue;
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+ sdesc = list_first_entry(&schan->active,
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+ struct sirfsoc_dma_desc,
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+ node);
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+ save->ctrl[ch] = readl_relaxed(sdma->base +
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+ ch * 0x10 + SIRFSOC_DMA_CH_CTRL);
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+ }
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+ save->interrupt_en = readl_relaxed(sdma->base + SIRFSOC_DMA_INT_EN);
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+
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+ /* Disable clock */
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+ sirfsoc_dma_runtime_suspend(dev);
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+
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+ return 0;
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+}
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+
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+static int sirfsoc_dma_pm_resume(struct device *dev)
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+{
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+ struct sirfsoc_dma *sdma = dev_get_drvdata(dev);
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+ struct sirfsoc_dma_regs *save = &sdma->regs_save;
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+ struct sirfsoc_dma_desc *sdesc;
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+ struct sirfsoc_dma_chan *schan;
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+ int ch;
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+ int ret;
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+
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+ /* Enable clock before accessing register */
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+ ret = sirfsoc_dma_runtime_resume(dev);
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+ if (ret < 0)
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+ return ret;
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+
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+ writel_relaxed(save->interrupt_en, sdma->base + SIRFSOC_DMA_INT_EN);
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+ for (ch = 0; ch < SIRFSOC_DMA_CHANNELS; ch++) {
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+ schan = &sdma->channels[ch];
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+ if (list_empty(&schan->active))
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+ continue;
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+ sdesc = list_first_entry(&schan->active,
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+ struct sirfsoc_dma_desc,
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+ node);
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+ writel_relaxed(sdesc->width,
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+ sdma->base + SIRFSOC_DMA_WIDTH_0 + ch * 4);
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+ writel_relaxed(sdesc->xlen,
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+ sdma->base + ch * 0x10 + SIRFSOC_DMA_CH_XLEN);
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+ writel_relaxed(sdesc->ylen,
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+ sdma->base + ch * 0x10 + SIRFSOC_DMA_CH_YLEN);
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+ writel_relaxed(save->ctrl[ch],
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+ sdma->base + ch * 0x10 + SIRFSOC_DMA_CH_CTRL);
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+ writel_relaxed(sdesc->addr >> 2,
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+ sdma->base + ch * 0x10 + SIRFSOC_DMA_CH_ADDR);
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+ }
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+
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+ /* if we were runtime-suspended before, suspend again */
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+ if (pm_runtime_status_suspended(dev))
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+ sirfsoc_dma_runtime_suspend(dev);
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+
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return 0;
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}
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+static const struct dev_pm_ops sirfsoc_dma_pm_ops = {
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+ SET_RUNTIME_PM_OPS(sirfsoc_dma_runtime_suspend, sirfsoc_dma_runtime_resume, NULL)
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+ SET_SYSTEM_SLEEP_PM_OPS(sirfsoc_dma_pm_suspend, sirfsoc_dma_pm_resume)
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+};
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+
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static struct of_device_id sirfsoc_dma_match[] = {
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{ .compatible = "sirf,prima2-dmac", },
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{ .compatible = "sirf,marco-dmac", },
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@@ -766,6 +891,7 @@ static struct platform_driver sirfsoc_dma_driver = {
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.driver = {
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.name = DRV_NAME,
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.owner = THIS_MODULE,
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+ .pm = &sirfsoc_dma_pm_ops,
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.of_match_table = sirfsoc_dma_match,
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},
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};
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