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@@ -554,20 +554,20 @@ EXPORT_SYMBOL_GPL(em28xx_audio_setup);
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int em28xx_colorlevels_set_default(struct em28xx *dev)
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{
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- em28xx_write_regs(dev, EM28XX_R20_YGAIN, "\x10", 1); /* contrast */
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- em28xx_write_regs(dev, EM28XX_R21_YOFFSET, "\x00", 1); /* brightness */
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- em28xx_write_regs(dev, EM28XX_R22_UVGAIN, "\x10", 1); /* saturation */
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- em28xx_write_regs(dev, EM28XX_R23_UOFFSET, "\x00", 1);
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- em28xx_write_regs(dev, EM28XX_R24_VOFFSET, "\x00", 1);
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- em28xx_write_regs(dev, EM28XX_R25_SHARPNESS, "\x00", 1);
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-
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- em28xx_write_regs(dev, EM28XX_R14_GAMMA, "\x20", 1);
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- em28xx_write_regs(dev, EM28XX_R15_RGAIN, "\x20", 1);
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- em28xx_write_regs(dev, EM28XX_R16_GGAIN, "\x20", 1);
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- em28xx_write_regs(dev, EM28XX_R17_BGAIN, "\x20", 1);
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- em28xx_write_regs(dev, EM28XX_R18_ROFFSET, "\x00", 1);
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- em28xx_write_regs(dev, EM28XX_R19_GOFFSET, "\x00", 1);
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- return em28xx_write_regs(dev, EM28XX_R1A_BOFFSET, "\x00", 1);
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+ em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x10); /* contrast */
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+ em28xx_write_reg(dev, EM28XX_R21_YOFFSET, 0x00); /* brightness */
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+ em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x10); /* saturation */
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+ em28xx_write_reg(dev, EM28XX_R23_UOFFSET, 0x00);
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+ em28xx_write_reg(dev, EM28XX_R24_VOFFSET, 0x00);
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+ em28xx_write_reg(dev, EM28XX_R25_SHARPNESS, 0x00);
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+
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+ em28xx_write_reg(dev, EM28XX_R14_GAMMA, 0x20);
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+ em28xx_write_reg(dev, EM28XX_R15_RGAIN, 0x20);
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+ em28xx_write_reg(dev, EM28XX_R16_GGAIN, 0x20);
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+ em28xx_write_reg(dev, EM28XX_R17_BGAIN, 0x20);
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+ em28xx_write_reg(dev, EM28XX_R18_ROFFSET, 0x00);
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+ em28xx_write_reg(dev, EM28XX_R19_GOFFSET, 0x00);
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+ return em28xx_write_reg(dev, EM28XX_R1A_BOFFSET, 0x00);
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}
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int em28xx_capture_start(struct em28xx *dev, int start)
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@@ -600,17 +600,17 @@ int em28xx_capture_start(struct em28xx *dev, int start)
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if (!start) {
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/* disable video capture */
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- rc = em28xx_write_regs(dev, EM28XX_R12_VINENABLE, "\x27", 1);
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+ rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27);
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return rc;
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}
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/* enable video capture */
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- rc = em28xx_write_regs_req(dev, 0x00, 0x48, "\x00", 1);
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+ rc = em28xx_write_reg(dev, 0x48, 0x00);
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if (dev->mode == EM28XX_ANALOG_MODE)
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- rc = em28xx_write_regs(dev, EM28XX_R12_VINENABLE, "\x67", 1);
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+ rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
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else
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- rc = em28xx_write_regs(dev, EM28XX_R12_VINENABLE, "\x37", 1);
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+ rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
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msleep(6);
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@@ -619,9 +619,9 @@ int em28xx_capture_start(struct em28xx *dev, int start)
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int em28xx_outfmt_set_yuv422(struct em28xx *dev)
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{
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- em28xx_write_regs(dev, EM28XX_R27_OUTFMT, "\x34", 1);
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- em28xx_write_regs(dev, EM28XX_R10_VINMODE, "\x10", 1);
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- return em28xx_write_regs(dev, EM28XX_R11_VINCTRL, "\x11", 1);
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+ em28xx_write_reg(dev, EM28XX_R27_OUTFMT, 0x34);
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+ em28xx_write_reg(dev, EM28XX_R10_VINMODE, 0x10);
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+ return em28xx_write_reg(dev, EM28XX_R11_VINCTRL, 0x11);
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}
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static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax,
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@@ -737,11 +737,11 @@ int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio)
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if (!gpio)
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return rc;
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- dev->em28xx_write_regs_req(dev, 0x00, 0x48, "\x00", 1);
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+ em28xx_write_reg(dev, 0x48, 0x00);
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if (dev->mode == EM28XX_ANALOG_MODE)
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- dev->em28xx_write_regs_req(dev, 0x00, 0x12, "\x67", 1);
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+ em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
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else
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- dev->em28xx_write_regs_req(dev, 0x00, 0x12, "\x37", 1);
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+ em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
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msleep(6);
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/* Send GPIO reset sequences specified at board entry */
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