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@@ -92,23 +92,21 @@ unsigned int pxa25x_get_clk_frequency_khz(int info)
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return (turbo & 1) ? (N/1000) : (M/1000);
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}
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-/*
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- * Return the current memory clock frequency in units of 10kHz
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- */
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-unsigned int pxa25x_get_memclk_frequency_10khz(void)
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+static unsigned long clk_pxa25x_mem_getrate(struct clk *clk)
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{
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- return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK / 10000;
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+ return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK;
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}
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-static unsigned long clk_pxa25x_lcd_getrate(struct clk *clk)
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-{
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- return pxa25x_get_memclk_frequency_10khz() * 10000;
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-}
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+static const struct clkops clk_pxa25x_mem_ops = {
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+ .enable = clk_dummy_enable,
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+ .disable = clk_dummy_disable,
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+ .getrate = clk_pxa25x_mem_getrate,
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+};
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static const struct clkops clk_pxa25x_lcd_ops = {
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.enable = clk_pxa2xx_cken_enable,
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.disable = clk_pxa2xx_cken_disable,
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- .getrate = clk_pxa25x_lcd_getrate,
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+ .getrate = clk_pxa25x_mem_getrate,
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};
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static unsigned long gpio12_config_32k[] = {
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@@ -185,6 +183,7 @@ static DEFINE_PXA2_CKEN(pxa25x_ficp, FICP, 47923000, 0);
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static DEFINE_CK(pxa25x_lcd, LCD, &clk_pxa25x_lcd_ops);
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static DEFINE_CLK(pxa25x_gpio11, &clk_pxa25x_gpio11_ops, 3686400, 0);
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static DEFINE_CLK(pxa25x_gpio12, &clk_pxa25x_gpio12_ops, 32768, 0);
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+static DEFINE_CLK(pxa25x_mem, &clk_pxa25x_mem_ops, 0, 0);
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static struct clk_lookup pxa25x_clkregs[] = {
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INIT_CLKREG(&clk_pxa25x_lcd, "pxa2xx-fb", NULL),
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@@ -205,6 +204,7 @@ static struct clk_lookup pxa25x_clkregs[] = {
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INIT_CLKREG(&clk_pxa25x_ac97, NULL, "AC97CLK"),
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INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
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INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
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+ INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL),
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};
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static struct clk_lookup pxa25x_hwuart_clkreg =
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