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@@ -8652,6 +8652,7 @@ u32 bnx2x_send_unload_req(struct bnx2x *bp, int unload_mode)
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else if (bp->wol) {
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u32 emac_base = port ? GRCBASE_EMAC1 : GRCBASE_EMAC0;
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u8 *mac_addr = bp->dev->dev_addr;
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+ struct pci_dev *pdev = bp->pdev;
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u32 val;
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u16 pmc;
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@@ -8668,9 +8669,9 @@ u32 bnx2x_send_unload_req(struct bnx2x *bp, int unload_mode)
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EMAC_WR(bp, EMAC_REG_EMAC_MAC_MATCH + entry + 4, val);
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/* Enable the PME and clear the status */
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- pci_read_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, &pmc);
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+ pci_read_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, &pmc);
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pmc |= PCI_PM_CTRL_PME_ENABLE | PCI_PM_CTRL_PME_STATUS;
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- pci_write_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, pmc);
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+ pci_write_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, pmc);
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reset_code = DRV_MSG_CODE_UNLOAD_REQ_WOL_EN;
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@@ -10399,7 +10400,7 @@ static void bnx2x_get_common_hwinfo(struct bnx2x *bp)
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break;
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}
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- pci_read_config_word(bp->pdev, bp->pm_cap + PCI_PM_PMC, &pmc);
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+ pci_read_config_word(bp->pdev, bp->pdev->pm_cap + PCI_PM_PMC, &pmc);
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bp->flags |= (pmc & PCI_PM_CAP_PME_D3cold) ? 0 : NO_WOL_FLAG;
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BNX2X_DEV_INFO("%sWoL capable\n",
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@@ -12141,8 +12142,7 @@ static int bnx2x_init_dev(struct bnx2x *bp, struct pci_dev *pdev,
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}
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if (IS_PF(bp)) {
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- bp->pm_cap = pdev->pm_cap;
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- if (bp->pm_cap == 0) {
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+ if (!pdev->pm_cap) {
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dev_err(&bp->pdev->dev,
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"Cannot find power management capability, aborting\n");
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rc = -EIO;
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