|
@@ -287,6 +287,53 @@
|
|
|
ti,hwmods = "dmic";
|
|
|
};
|
|
|
|
|
|
+ mcbsp1: mcbsp@40122000 {
|
|
|
+ compatible = "ti,omap4-mcbsp";
|
|
|
+ reg = <0x40122000 0xff>, /* MPU private access */
|
|
|
+ <0x49022000 0xff>; /* L3 Interconnect */
|
|
|
+ reg-names = "mpu", "dma";
|
|
|
+ interrupts = <0 17 0x4>;
|
|
|
+ interrupt-names = "common";
|
|
|
+ interrupt-parent = <&gic>;
|
|
|
+ ti,buffer-size = <128>;
|
|
|
+ ti,hwmods = "mcbsp1";
|
|
|
+ };
|
|
|
+
|
|
|
+ mcbsp2: mcbsp@40124000 {
|
|
|
+ compatible = "ti,omap4-mcbsp";
|
|
|
+ reg = <0x40124000 0xff>, /* MPU private access */
|
|
|
+ <0x49024000 0xff>; /* L3 Interconnect */
|
|
|
+ reg-names = "mpu", "dma";
|
|
|
+ interrupts = <0 22 0x4>;
|
|
|
+ interrupt-names = "common";
|
|
|
+ interrupt-parent = <&gic>;
|
|
|
+ ti,buffer-size = <128>;
|
|
|
+ ti,hwmods = "mcbsp2";
|
|
|
+ };
|
|
|
+
|
|
|
+ mcbsp3: mcbsp@40126000 {
|
|
|
+ compatible = "ti,omap4-mcbsp";
|
|
|
+ reg = <0x40126000 0xff>, /* MPU private access */
|
|
|
+ <0x49026000 0xff>; /* L3 Interconnect */
|
|
|
+ reg-names = "mpu", "dma";
|
|
|
+ interrupts = <0 23 0x4>;
|
|
|
+ interrupt-names = "common";
|
|
|
+ interrupt-parent = <&gic>;
|
|
|
+ ti,buffer-size = <128>;
|
|
|
+ ti,hwmods = "mcbsp3";
|
|
|
+ };
|
|
|
+
|
|
|
+ mcbsp4: mcbsp@48096000 {
|
|
|
+ compatible = "ti,omap4-mcbsp";
|
|
|
+ reg = <0x48096000 0xff>; /* L4 Interconnect */
|
|
|
+ reg-names = "mpu";
|
|
|
+ interrupts = <0 16 0x4>;
|
|
|
+ interrupt-names = "common";
|
|
|
+ interrupt-parent = <&gic>;
|
|
|
+ ti,buffer-size = <128>;
|
|
|
+ ti,hwmods = "mcbsp4";
|
|
|
+ };
|
|
|
+
|
|
|
keypad: keypad@4a31c000 {
|
|
|
compatible = "ti,omap4-keypad";
|
|
|
ti,hwmods = "kbd";
|