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@@ -100,9 +100,9 @@ TODO:
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#define PCI9111_AI_RANGE_REG 0x08
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#define PCI9111_RANGE_STATUS_REG 0x08
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#define PCI9111_REGISTER_TRIGGER_MODE_CONTROL 0x0A
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-#define PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK 0x0A
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+#define PCI9111_AI_MODE_INT_RB_REG 0x0A
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#define PCI9111_SOFTWARE_TRIGGER_REG 0x0E
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-#define PCI9111_REGISTER_INTERRUPT_CONTROL 0x0C
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+#define PCI9111_INT_CTRL_REG 0x0C
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#define PCI9111_8254_BASE_REG 0x40
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#define PCI9111_INT_CLR_REG 0x48
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@@ -134,25 +134,18 @@ TODO:
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*/
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#define pci9111_trigger_and_autoscan_get() \
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- (inb(dev->iobase + PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK)&0x0F)
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+ (inb(dev->iobase + PCI9111_AI_MODE_INT_RB_REG)&0x0F)
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#define pci9111_trigger_and_autoscan_set(flags) \
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outb(flags, dev->iobase + PCI9111_REGISTER_TRIGGER_MODE_CONTROL)
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-#define pci9111_interrupt_and_fifo_get() \
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- ((inb(dev->iobase + PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK) \
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- >> 4) & 0x03)
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-
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-#define pci9111_interrupt_and_fifo_set(flags) \
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- outb(flags, dev->iobase + PCI9111_REGISTER_INTERRUPT_CONTROL)
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-
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#define pci9111_fifo_reset() do { \
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outb(PCI9111_FFEN_SET_FIFO_ENABLE, \
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- dev->iobase + PCI9111_REGISTER_INTERRUPT_CONTROL); \
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+ dev->iobase + PCI9111_INT_CTRL_REG); \
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outb(PCI9111_FFEN_SET_FIFO_DISABLE, \
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- dev->iobase + PCI9111_REGISTER_INTERRUPT_CONTROL); \
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+ dev->iobase + PCI9111_INT_CTRL_REG); \
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outb(PCI9111_FFEN_SET_FIFO_ENABLE, \
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- dev->iobase + PCI9111_REGISTER_INTERRUPT_CONTROL); \
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+ dev->iobase + PCI9111_INT_CTRL_REG); \
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} while (0)
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@@ -322,15 +315,21 @@ static void pci9111_interrupt_source_set(struct comedi_device *dev,
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{
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int flags;
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- flags = pci9111_interrupt_and_fifo_get() & 0x04;
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+ /* Read the current interrupt control bits */
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+ flags = inb(dev->iobase + PCI9111_AI_MODE_INT_RB_REG);
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+ /* Shift the bits so they are compatible with the write register */
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+ flags >>= 4;
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+ /* Mask off the ISCx bits */
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+ flags &= 0xc0;
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+ /* Now set the new ISCx bits */
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if (irq_0_source == irq_on_fifo_half_full)
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flags |= PCI9111_ISC0_SET_IRQ_ON_FIFO_HALF_FULL;
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if (irq_1_source == irq_on_external_trigger)
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flags |= PCI9111_ISC1_SET_IRQ_ON_EXT_TRG;
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- pci9111_interrupt_and_fifo_set(flags);
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+ outb(flags, dev->iobase + PCI9111_INT_CTRL_REG);
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}
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/* ------------------------------------------------------------------ */
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