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@@ -55,8 +55,8 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data);
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* access registers. If something outside of PCI is ioremap'd, we
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* access registers. If something outside of PCI is ioremap'd, we
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* fallback to the default.
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* fallback to the default.
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*/
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*/
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-static inline void __iomem *
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-__ixp4xx_ioremap(unsigned long addr, size_t size, unsigned int mtype)
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+static inline void __iomem * __indirect_ioremap(unsigned long addr, size_t size,
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+ unsigned int mtype)
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{
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{
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if((addr < PCIBIOS_MIN_MEM) || (addr > 0x4fffffff))
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if((addr < PCIBIOS_MIN_MEM) || (addr > 0x4fffffff))
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return __arm_ioremap(addr, size, mtype);
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return __arm_ioremap(addr, size, mtype);
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@@ -64,34 +64,32 @@ __ixp4xx_ioremap(unsigned long addr, size_t size, unsigned int mtype)
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return (void __iomem *)addr;
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return (void __iomem *)addr;
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}
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}
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-static inline void
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-__ixp4xx_iounmap(void __iomem *addr)
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+static inline void __indirect_iounmap(void __iomem *addr)
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{
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{
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if ((__force u32)addr >= VMALLOC_START)
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if ((__force u32)addr >= VMALLOC_START)
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__iounmap(addr);
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__iounmap(addr);
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}
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}
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-#define __arch_ioremap(a, s, f) __ixp4xx_ioremap(a, s, f)
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-#define __arch_iounmap(a) __ixp4xx_iounmap(a)
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+#define __arch_ioremap(a, s, f) __indirect_ioremap(a, s, f)
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+#define __arch_iounmap(a) __indirect_iounmap(a)
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-#define writeb(v, p) __ixp4xx_writeb(v, p)
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-#define writew(v, p) __ixp4xx_writew(v, p)
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-#define writel(v, p) __ixp4xx_writel(v, p)
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+#define writeb(v, p) __indirect_writeb(v, p)
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+#define writew(v, p) __indirect_writew(v, p)
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+#define writel(v, p) __indirect_writel(v, p)
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-#define writesb(p, v, l) __ixp4xx_writesb(p, v, l)
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-#define writesw(p, v, l) __ixp4xx_writesw(p, v, l)
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-#define writesl(p, v, l) __ixp4xx_writesl(p, v, l)
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-
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-#define readb(p) __ixp4xx_readb(p)
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-#define readw(p) __ixp4xx_readw(p)
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-#define readl(p) __ixp4xx_readl(p)
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-
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-#define readsb(p, v, l) __ixp4xx_readsb(p, v, l)
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-#define readsw(p, v, l) __ixp4xx_readsw(p, v, l)
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-#define readsl(p, v, l) __ixp4xx_readsl(p, v, l)
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+#define writesb(p, v, l) __indirect_writesb(p, v, l)
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+#define writesw(p, v, l) __indirect_writesw(p, v, l)
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+#define writesl(p, v, l) __indirect_writesl(p, v, l)
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-static inline void
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-__ixp4xx_writeb(u8 value, volatile void __iomem *p)
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+#define readb(p) __indirect_readb(p)
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+#define readw(p) __indirect_readw(p)
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+#define readl(p) __indirect_readl(p)
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+
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+#define readsb(p, v, l) __indirect_readsb(p, v, l)
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+#define readsw(p, v, l) __indirect_readsw(p, v, l)
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+#define readsl(p, v, l) __indirect_readsl(p, v, l)
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+
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+static inline void __indirect_writeb(u8 value, volatile void __iomem *p)
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{
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{
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u32 addr = (u32)p;
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u32 addr = (u32)p;
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u32 n, byte_enables, data;
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u32 n, byte_enables, data;
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@@ -107,15 +105,14 @@ __ixp4xx_writeb(u8 value, volatile void __iomem *p)
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ixp4xx_pci_write(addr, byte_enables | NP_CMD_MEMWRITE, data);
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ixp4xx_pci_write(addr, byte_enables | NP_CMD_MEMWRITE, data);
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}
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}
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-static inline void
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-__ixp4xx_writesb(volatile void __iomem *bus_addr, const u8 *vaddr, int count)
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+static inline void __indirect_writesb(volatile void __iomem *bus_addr,
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+ const u8 *vaddr, int count)
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{
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{
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while (count--)
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while (count--)
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writeb(*vaddr++, bus_addr);
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writeb(*vaddr++, bus_addr);
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}
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}
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-static inline void
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-__ixp4xx_writew(u16 value, volatile void __iomem *p)
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+static inline void __indirect_writew(u16 value, volatile void __iomem *p)
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{
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{
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u32 addr = (u32)p;
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u32 addr = (u32)p;
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u32 n, byte_enables, data;
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u32 n, byte_enables, data;
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@@ -131,15 +128,14 @@ __ixp4xx_writew(u16 value, volatile void __iomem *p)
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ixp4xx_pci_write(addr, byte_enables | NP_CMD_MEMWRITE, data);
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ixp4xx_pci_write(addr, byte_enables | NP_CMD_MEMWRITE, data);
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}
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}
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-static inline void
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-__ixp4xx_writesw(volatile void __iomem *bus_addr, const u16 *vaddr, int count)
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+static inline void __indirect_writesw(volatile void __iomem *bus_addr,
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+ const u16 *vaddr, int count)
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{
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{
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while (count--)
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while (count--)
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writew(*vaddr++, bus_addr);
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writew(*vaddr++, bus_addr);
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}
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}
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-static inline void
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-__ixp4xx_writel(u32 value, volatile void __iomem *p)
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+static inline void __indirect_writel(u32 value, volatile void __iomem *p)
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{
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{
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u32 addr = (__force u32)p;
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u32 addr = (__force u32)p;
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if (addr >= VMALLOC_START) {
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if (addr >= VMALLOC_START) {
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@@ -150,15 +146,14 @@ __ixp4xx_writel(u32 value, volatile void __iomem *p)
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ixp4xx_pci_write(addr, NP_CMD_MEMWRITE, value);
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ixp4xx_pci_write(addr, NP_CMD_MEMWRITE, value);
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}
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}
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-static inline void
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-__ixp4xx_writesl(volatile void __iomem *bus_addr, const u32 *vaddr, int count)
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+static inline void __indirect_writesl(volatile void __iomem *bus_addr,
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+ const u32 *vaddr, int count)
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{
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{
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while (count--)
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while (count--)
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writel(*vaddr++, bus_addr);
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writel(*vaddr++, bus_addr);
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}
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}
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-static inline unsigned char
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-__ixp4xx_readb(const volatile void __iomem *p)
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+static inline unsigned char __indirect_readb(const volatile void __iomem *p)
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{
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{
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u32 addr = (u32)p;
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u32 addr = (u32)p;
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u32 n, byte_enables, data;
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u32 n, byte_enables, data;
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@@ -174,15 +169,14 @@ __ixp4xx_readb(const volatile void __iomem *p)
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return data >> (8*n);
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return data >> (8*n);
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}
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}
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-static inline void
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-__ixp4xx_readsb(const volatile void __iomem *bus_addr, u8 *vaddr, u32 count)
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+static inline void __indirect_readsb(const volatile void __iomem *bus_addr,
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+ u8 *vaddr, u32 count)
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{
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{
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while (count--)
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while (count--)
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*vaddr++ = readb(bus_addr);
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*vaddr++ = readb(bus_addr);
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}
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}
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-static inline unsigned short
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-__ixp4xx_readw(const volatile void __iomem *p)
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+static inline unsigned short __indirect_readw(const volatile void __iomem *p)
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{
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{
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u32 addr = (u32)p;
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u32 addr = (u32)p;
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u32 n, byte_enables, data;
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u32 n, byte_enables, data;
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@@ -198,15 +192,14 @@ __ixp4xx_readw(const volatile void __iomem *p)
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return data>>(8*n);
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return data>>(8*n);
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}
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}
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-static inline void
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-__ixp4xx_readsw(const volatile void __iomem *bus_addr, u16 *vaddr, u32 count)
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+static inline void __indirect_readsw(const volatile void __iomem *bus_addr,
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+ u16 *vaddr, u32 count)
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{
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{
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while (count--)
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while (count--)
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*vaddr++ = readw(bus_addr);
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*vaddr++ = readw(bus_addr);
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}
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}
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-static inline unsigned long
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-__ixp4xx_readl(const volatile void __iomem *p)
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+static inline unsigned long __indirect_readl(const volatile void __iomem *p)
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{
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{
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u32 addr = (__force u32)p;
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u32 addr = (__force u32)p;
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u32 data;
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u32 data;
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@@ -220,8 +213,8 @@ __ixp4xx_readl(const volatile void __iomem *p)
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return data;
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return data;
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}
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}
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-static inline void
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-__ixp4xx_readsl(const volatile void __iomem *bus_addr, u32 *vaddr, u32 count)
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+static inline void __indirect_readsl(const volatile void __iomem *bus_addr,
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+ u32 *vaddr, u32 count)
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{
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{
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while (count--)
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while (count--)
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*vaddr++ = readl(bus_addr);
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*vaddr++ = readl(bus_addr);
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@@ -235,7 +228,7 @@ __ixp4xx_readsl(const volatile void __iomem *bus_addr, u32 *vaddr, u32 count)
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#define memcpy_fromio(a,c,l) _memcpy_fromio((a),(c),(l))
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#define memcpy_fromio(a,c,l) _memcpy_fromio((a),(c),(l))
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#define memcpy_toio(c,a,l) _memcpy_toio((c),(a),(l))
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#define memcpy_toio(c,a,l) _memcpy_toio((c),(a),(l))
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-#endif
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+#endif /* CONFIG_IXP4XX_INDIRECT_PCI */
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#ifndef CONFIG_PCI
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#ifndef CONFIG_PCI
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@@ -385,7 +378,7 @@ __ixp4xx_ioread8(const void __iomem *addr)
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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return (unsigned int)__raw_readb(port);
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return (unsigned int)__raw_readb(port);
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#else
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#else
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- return (unsigned int)__ixp4xx_readb(addr);
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+ return (unsigned int)__indirect_readb(addr);
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#endif
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#endif
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}
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}
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@@ -399,7 +392,7 @@ __ixp4xx_ioread8_rep(const void __iomem *addr, void *vaddr, u32 count)
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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__raw_readsb(addr, vaddr, count);
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__raw_readsb(addr, vaddr, count);
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#else
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#else
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- __ixp4xx_readsb(addr, vaddr, count);
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+ __indirect_readsb(addr, vaddr, count);
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#endif
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#endif
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}
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}
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@@ -413,7 +406,7 @@ __ixp4xx_ioread16(const void __iomem *addr)
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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return le16_to_cpu(__raw_readw((u32)port));
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return le16_to_cpu(__raw_readw((u32)port));
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#else
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#else
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- return (unsigned int)__ixp4xx_readw(addr);
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+ return (unsigned int)__indirect_readw(addr);
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#endif
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#endif
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}
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}
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@@ -427,7 +420,7 @@ __ixp4xx_ioread16_rep(const void __iomem *addr, void *vaddr, u32 count)
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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__raw_readsw(addr, vaddr, count);
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__raw_readsw(addr, vaddr, count);
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#else
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#else
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- __ixp4xx_readsw(addr, vaddr, count);
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+ __indirect_readsw(addr, vaddr, count);
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#endif
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#endif
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}
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}
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@@ -441,7 +434,7 @@ __ixp4xx_ioread32(const void __iomem *addr)
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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return le32_to_cpu((__force __le32)__raw_readl(addr));
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return le32_to_cpu((__force __le32)__raw_readl(addr));
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#else
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#else
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- return (unsigned int)__ixp4xx_readl(addr);
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+ return (unsigned int)__indirect_readl(addr);
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#endif
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#endif
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}
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}
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}
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}
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@@ -456,7 +449,7 @@ __ixp4xx_ioread32_rep(const void __iomem *addr, void *vaddr, u32 count)
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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__raw_readsl(addr, vaddr, count);
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__raw_readsl(addr, vaddr, count);
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#else
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#else
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- __ixp4xx_readsl(addr, vaddr, count);
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+ __indirect_readsl(addr, vaddr, count);
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#endif
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#endif
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}
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}
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@@ -470,7 +463,7 @@ __ixp4xx_iowrite8(u8 value, void __iomem *addr)
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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__raw_writeb(value, port);
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__raw_writeb(value, port);
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#else
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#else
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- __ixp4xx_writeb(value, addr);
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+ __indirect_writeb(value, addr);
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#endif
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#endif
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}
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}
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@@ -484,7 +477,7 @@ __ixp4xx_iowrite8_rep(void __iomem *addr, const void *vaddr, u32 count)
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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__raw_writesb(addr, vaddr, count);
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__raw_writesb(addr, vaddr, count);
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#else
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#else
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- __ixp4xx_writesb(addr, vaddr, count);
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+ __indirect_writesb(addr, vaddr, count);
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#endif
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#endif
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}
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}
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@@ -498,7 +491,7 @@ __ixp4xx_iowrite16(u16 value, void __iomem *addr)
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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__raw_writew(cpu_to_le16(value), addr);
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__raw_writew(cpu_to_le16(value), addr);
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#else
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#else
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- __ixp4xx_writew(value, addr);
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+ __indirect_writew(value, addr);
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#endif
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#endif
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}
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}
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@@ -512,7 +505,7 @@ __ixp4xx_iowrite16_rep(void __iomem *addr, const void *vaddr, u32 count)
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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__raw_writesw(addr, vaddr, count);
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__raw_writesw(addr, vaddr, count);
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#else
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#else
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- __ixp4xx_writesw(addr, vaddr, count);
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+ __indirect_writesw(addr, vaddr, count);
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#endif
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#endif
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}
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}
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@@ -526,7 +519,7 @@ __ixp4xx_iowrite32(u32 value, void __iomem *addr)
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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__raw_writel((u32 __force)cpu_to_le32(value), addr);
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__raw_writel((u32 __force)cpu_to_le32(value), addr);
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#else
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#else
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- __ixp4xx_writel(value, addr);
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+ __indirect_writel(value, addr);
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#endif
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#endif
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}
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}
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@@ -540,7 +533,7 @@ __ixp4xx_iowrite32_rep(void __iomem *addr, const void *vaddr, u32 count)
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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__raw_writesl(addr, vaddr, count);
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__raw_writesl(addr, vaddr, count);
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#else
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#else
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- __ixp4xx_writesl(addr, vaddr, count);
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+ __indirect_writesl(addr, vaddr, count);
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#endif
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#endif
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}
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}
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