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@@ -36,14 +36,13 @@
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#include <linux/interrupt.h>
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#include <linux/spinlock.h>
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+#include <asm/processor.h>
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#include <asm/time.h>
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#include <asm/mach-au1x00/au1000.h>
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/* 32kHz clock enabled and detected */
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#define CNTR_OK (SYS_CNTRL_E0 | SYS_CNTRL_32S)
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-extern int allow_au1k_wait; /* default off for CP0 Counter */
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-
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static cycle_t au1x_counter1_read(struct clocksource *cs)
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{
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return au_readl(SYS_RTCREAD);
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@@ -153,13 +152,17 @@ void __init plat_time_init(void)
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printk(KERN_INFO "Alchemy clocksource installed\n");
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- /* can now use 'wait' */
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- allow_au1k_wait = 1;
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return;
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cntr_err:
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- /* counters unusable, use C0 counter */
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+ /*
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+ * MIPS kernel assigns 'au1k_wait' to 'cpu_wait' before this
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+ * function is called. Because the Alchemy counters are unusable
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+ * the C0 timekeeping code is installed and use of the 'wait'
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+ * instruction must be prohibited, which is done most easily by
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+ * assigning NULL to cpu_wait.
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+ */
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+ cpu_wait = NULL;
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r4k_clockevent_init();
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init_r4k_clocksource();
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- allow_au1k_wait = 0;
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}
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