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@@ -164,11 +164,11 @@ static void vhpt_insert(u64 pte, u64 itir, u64 ifa, u64 gpte)
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unsigned long ps, gpaddr;
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ps = itir_ps(itir);
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+ rr.val = ia64_get_rr(ifa);
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- gpaddr = ((gpte & _PAGE_PPN_MASK) >> ps << ps) |
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- (ifa & ((1UL << ps) - 1));
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+ gpaddr = ((gpte & _PAGE_PPN_MASK) >> ps << ps) |
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+ (ifa & ((1UL << ps) - 1));
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- rr.val = ia64_get_rr(ifa);
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head = (struct thash_data *)ia64_thash(ifa);
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head->etag = INVALID_TI_TAG;
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ia64_mf();
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@@ -412,16 +412,14 @@ u64 translate_phy_pte(u64 *pte, u64 itir, u64 va)
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/*
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* Purge overlap TCs and then insert the new entry to emulate itc ops.
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- * Notes: Only TC entry can purge and insert.
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- * 1 indicates this is MMIO
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+ * Notes: Only TC entry can purge and insert.
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*/
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-int thash_purge_and_insert(struct kvm_vcpu *v, u64 pte, u64 itir,
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+void thash_purge_and_insert(struct kvm_vcpu *v, u64 pte, u64 itir,
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u64 ifa, int type)
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{
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u64 ps;
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u64 phy_pte, io_mask, index;
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union ia64_rr vrr, mrr;
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- int ret = 0;
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ps = itir_ps(itir);
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vrr.val = vcpu_get_rr(v, ifa);
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@@ -441,25 +439,19 @@ int thash_purge_and_insert(struct kvm_vcpu *v, u64 pte, u64 itir,
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phy_pte &= ~_PAGE_MA_MASK;
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}
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- if (pte & VTLB_PTE_IO)
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- ret = 1;
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-
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vtlb_purge(v, ifa, ps);
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vhpt_purge(v, ifa, ps);
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- if (ps == mrr.ps) {
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- if (!(pte&VTLB_PTE_IO)) {
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- vhpt_insert(phy_pte, itir, ifa, pte);
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- } else {
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- vtlb_insert(v, pte, itir, ifa);
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- vcpu_quick_region_set(VMX(v, tc_regions), ifa);
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- }
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- } else if (ps > mrr.ps) {
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+ if ((ps != mrr.ps) || (pte & VTLB_PTE_IO)) {
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vtlb_insert(v, pte, itir, ifa);
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vcpu_quick_region_set(VMX(v, tc_regions), ifa);
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- if (!(pte&VTLB_PTE_IO))
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- vhpt_insert(phy_pte, itir, ifa, pte);
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- } else {
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+ }
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+ if (pte & VTLB_PTE_IO)
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+ return;
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+
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+ if (ps >= mrr.ps)
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+ vhpt_insert(phy_pte, itir, ifa, pte);
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+ else {
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u64 psr;
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phy_pte &= ~PAGE_FLAGS_RV_MASK;
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psr = ia64_clear_ic();
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@@ -469,7 +461,6 @@ int thash_purge_and_insert(struct kvm_vcpu *v, u64 pte, u64 itir,
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if (!(pte&VTLB_PTE_IO))
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mark_pages_dirty(v, pte, ps);
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- return ret;
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}
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/*
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@@ -570,6 +561,10 @@ void thash_init(struct thash_cb *hcb, u64 sz)
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u64 kvm_get_mpt_entry(u64 gpfn)
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{
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u64 *base = (u64 *) KVM_P2M_BASE;
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+
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+ if (gpfn >= (KVM_P2M_SIZE >> 3))
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+ panic_vm(current_vcpu, "Invalid gpfn =%lx\n", gpfn);
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+
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return *(base + gpfn);
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}
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