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@@ -1,5 +1,5 @@
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/*
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- * linux/drivers/ide/pci/hpt366.c Version 1.03 May 4, 2007
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+ * linux/drivers/ide/pci/hpt366.c Version 1.04 Jun 4, 2007
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*
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* Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org>
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* Portions Copyright (C) 2001 Sun Microsystems, Inc.
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@@ -106,7 +106,8 @@
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* switch to calculating PCI clock frequency based on the chip's base DPLL
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* frequency
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* - switch to using the DPLL clock and enable UltraATA/133 mode by default on
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- * anything newer than HPT370/A
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+ * anything newer than HPT370/A (except HPT374 that is not capable of this
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+ * mode according to the manual)
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* - fold PCI clock detection and DPLL setup code into init_chipset_hpt366(),
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* also fixing the interchanged 25/40 MHz PCI clock cases for HPT36x chips;
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* unify HPT36x/37x timing setup code and the speedproc handlers by joining
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@@ -365,7 +366,6 @@ static u32 sixty_six_base_hpt37x[] = {
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};
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#define HPT366_DEBUG_DRIVE_INFO 0
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-#define HPT374_ALLOW_ATA133_6 1
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#define HPT371_ALLOW_ATA133_6 1
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#define HPT302_ALLOW_ATA133_6 1
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#define HPT372_ALLOW_ATA133_6 1
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@@ -450,7 +450,7 @@ static struct hpt_info hpt370a __devinitdata = {
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static struct hpt_info hpt374 __devinitdata = {
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.chip_type = HPT374,
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- .max_mode = HPT374_ALLOW_ATA133_6 ? 4 : 3,
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+ .max_mode = 3,
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.dpll_clk = 48,
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.settings = hpt37x_settings
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};
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