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@@ -47,22 +47,22 @@ rx164_update_irq_hw(unsigned long mask)
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}
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static inline void
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-rx164_enable_irq(unsigned int irq)
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+rx164_enable_irq(struct irq_data *d)
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{
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- rx164_update_irq_hw(cached_irq_mask |= 1UL << (irq - 16));
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+ rx164_update_irq_hw(cached_irq_mask |= 1UL << (d->irq - 16));
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}
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static void
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-rx164_disable_irq(unsigned int irq)
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+rx164_disable_irq(struct irq_data *d)
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{
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- rx164_update_irq_hw(cached_irq_mask &= ~(1UL << (irq - 16)));
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+ rx164_update_irq_hw(cached_irq_mask &= ~(1UL << (d->irq - 16)));
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}
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static struct irq_chip rx164_irq_type = {
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.name = "RX164",
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- .unmask = rx164_enable_irq,
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- .mask = rx164_disable_irq,
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- .mask_ack = rx164_disable_irq,
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+ .irq_unmask = rx164_enable_irq,
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+ .irq_mask = rx164_disable_irq,
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+ .irq_mask_ack = rx164_disable_irq,
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};
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static void
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@@ -99,8 +99,8 @@ rx164_init_irq(void)
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rx164_update_irq_hw(0);
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for (i = 16; i < 40; ++i) {
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- irq_to_desc(i)->status |= IRQ_LEVEL;
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set_irq_chip_and_handler(i, &rx164_irq_type, handle_level_irq);
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+ irq_set_status_flags(i, IRQ_LEVEL);
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}
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init_i8259a_irqs();
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