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@@ -38,40 +38,44 @@
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#ifdef CONFIG_CPU_IDLE
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-/*
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- * The latencies/thresholds for various C states have
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- * to be configured from the respective board files.
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- * These are some default values (which might not provide
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- * the best power savings) used on boards which do not
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- * pass these details from the board file.
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- */
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-static struct cpuidle_params cpuidle_params_table[] = {
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- /* C1 */
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- {2 + 2, 5, 1},
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- /* C2 */
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- {10 + 10, 30, 1},
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- /* C3 */
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- {50 + 50, 300, 1},
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- /* C4 */
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- {1500 + 1800, 4000, 1},
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- /* C5 */
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- {2500 + 7500, 12000, 1},
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- /* C6 */
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- {3000 + 8500, 15000, 1},
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- /* C7 */
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- {10000 + 30000, 300000, 1},
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-};
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-#define OMAP3_NUM_STATES ARRAY_SIZE(cpuidle_params_table)
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-
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/* Mach specific information to be recorded in the C-state driver_data */
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struct omap3_idle_statedata {
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u32 mpu_state;
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u32 core_state;
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- u8 valid;
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};
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-struct omap3_idle_statedata omap3_idle_data[OMAP3_NUM_STATES];
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-struct powerdomain *mpu_pd, *core_pd, *per_pd, *cam_pd;
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+static struct omap3_idle_statedata omap3_idle_data[] = {
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+ {
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+ .mpu_state = PWRDM_POWER_ON,
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+ .core_state = PWRDM_POWER_ON,
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+ },
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+ {
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+ .mpu_state = PWRDM_POWER_ON,
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+ .core_state = PWRDM_POWER_ON,
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+ },
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+ {
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+ .mpu_state = PWRDM_POWER_RET,
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+ .core_state = PWRDM_POWER_ON,
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+ },
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+ {
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+ .mpu_state = PWRDM_POWER_OFF,
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+ .core_state = PWRDM_POWER_ON,
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+ },
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+ {
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+ .mpu_state = PWRDM_POWER_RET,
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+ .core_state = PWRDM_POWER_RET,
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+ },
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+ {
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+ .mpu_state = PWRDM_POWER_OFF,
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+ .core_state = PWRDM_POWER_RET,
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+ },
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+ {
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+ .mpu_state = PWRDM_POWER_OFF,
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+ .core_state = PWRDM_POWER_OFF,
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+ },
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+};
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+
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+static struct powerdomain *mpu_pd, *core_pd, *per_pd, *cam_pd;
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static int _cpuidle_allow_idle(struct powerdomain *pwrdm,
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struct clockdomain *clkdm)
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@@ -91,8 +95,7 @@ static int __omap3_enter_idle(struct cpuidle_device *dev,
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struct cpuidle_driver *drv,
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int index)
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{
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- struct omap3_idle_statedata *cx =
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- cpuidle_get_statedata(&dev->states_usage[index]);
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+ struct omap3_idle_statedata *cx = &omap3_idle_data[index];
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u32 mpu_state = cx->mpu_state, core_state = cx->core_state;
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local_fiq_disable();
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@@ -169,14 +172,12 @@ static inline int omap3_enter_idle(struct cpuidle_device *dev,
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* if it satisfies the enable_off_mode condition.
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*/
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static int next_valid_state(struct cpuidle_device *dev,
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- struct cpuidle_driver *drv,
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- int index)
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+ struct cpuidle_driver *drv, int index)
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{
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- struct cpuidle_state_usage *curr_usage = &dev->states_usage[index];
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- struct cpuidle_state *curr = &drv->states[index];
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- struct omap3_idle_statedata *cx = cpuidle_get_statedata(curr_usage);
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+ struct omap3_idle_statedata *cx = &omap3_idle_data[index];
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u32 mpu_deepest_state = PWRDM_POWER_RET;
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u32 core_deepest_state = PWRDM_POWER_RET;
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+ int idx;
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int next_index = -1;
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if (enable_off_mode) {
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@@ -191,45 +192,29 @@ static int next_valid_state(struct cpuidle_device *dev,
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}
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/* Check if current state is valid */
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- if ((cx->valid) &&
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- (cx->mpu_state >= mpu_deepest_state) &&
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- (cx->core_state >= core_deepest_state)) {
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+ if ((cx->mpu_state >= mpu_deepest_state) &&
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+ (cx->core_state >= core_deepest_state))
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return index;
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- } else {
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- int idx = OMAP3_NUM_STATES - 1;
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-
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- /* Reach the current state starting at highest C-state */
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- for (; idx >= 0; idx--) {
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- if (&drv->states[idx] == curr) {
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- next_index = idx;
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- break;
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- }
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- }
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-
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- /* Should never hit this condition */
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- WARN_ON(next_index == -1);
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- /*
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- * Drop to next valid state.
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- * Start search from the next (lower) state.
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- */
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- idx--;
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- for (; idx >= 0; idx--) {
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- cx = cpuidle_get_statedata(&dev->states_usage[idx]);
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- if ((cx->valid) &&
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- (cx->mpu_state >= mpu_deepest_state) &&
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- (cx->core_state >= core_deepest_state)) {
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- next_index = idx;
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- break;
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- }
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+ /*
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+ * Drop to next valid state.
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+ * Start search from the next (lower) state.
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+ */
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+ for (idx = index - 1; idx >= 0; idx--) {
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+ cx = &omap3_idle_data[idx];
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+ if ((cx->mpu_state >= mpu_deepest_state) &&
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+ (cx->core_state >= core_deepest_state)) {
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+ next_index = idx;
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+ break;
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}
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- /*
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- * C1 is always valid.
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- * So, no need to check for 'next_index == -1' outside
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- * this loop.
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- */
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}
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+ /*
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+ * C1 is always valid.
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+ * So, no need to check for 'next_index == -1' outside
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+ * this loop.
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+ */
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+
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return next_index;
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}
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@@ -273,7 +258,7 @@ static int omap3_enter_idle_bm(struct cpuidle_device *dev,
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* Prevent PER off if CORE is not in retention or off as this
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* would disable PER wakeups completely.
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*/
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- cx = cpuidle_get_statedata(&dev->states_usage[index]);
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+ cx = &omap3_idle_data[index];
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core_next_state = cx->core_state;
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per_next_state = per_saved_state = pwrdm_read_next_pwrst(per_pd);
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if ((per_next_state == PWRDM_POWER_OFF) &&
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@@ -298,57 +283,71 @@ select_state:
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DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev);
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-void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params)
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-{
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- int i;
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-
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- if (!cpuidle_board_params)
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- return;
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-
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- for (i = 0; i < OMAP3_NUM_STATES; i++) {
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- cpuidle_params_table[i].valid = cpuidle_board_params[i].valid;
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- cpuidle_params_table[i].exit_latency =
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- cpuidle_board_params[i].exit_latency;
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- cpuidle_params_table[i].target_residency =
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- cpuidle_board_params[i].target_residency;
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- }
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- return;
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-}
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-
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struct cpuidle_driver omap3_idle_driver = {
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.name = "omap3_idle",
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.owner = THIS_MODULE,
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+ .states = {
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+ {
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+ .enter = omap3_enter_idle,
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+ .exit_latency = 2 + 2,
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+ .target_residency = 5,
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+ .flags = CPUIDLE_FLAG_TIME_VALID,
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+ .name = "C1",
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+ .desc = "MPU ON + CORE ON",
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+ },
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+ {
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+ .enter = omap3_enter_idle_bm,
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+ .exit_latency = 10 + 10,
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+ .target_residency = 30,
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+ .flags = CPUIDLE_FLAG_TIME_VALID,
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+ .name = "C2",
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+ .desc = "MPU ON + CORE ON",
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+ },
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+ {
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+ .enter = omap3_enter_idle_bm,
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+ .exit_latency = 50 + 50,
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+ .target_residency = 300,
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+ .flags = CPUIDLE_FLAG_TIME_VALID,
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+ .name = "C3",
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+ .desc = "MPU RET + CORE ON",
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+ },
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+ {
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+ .enter = omap3_enter_idle_bm,
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+ .exit_latency = 1500 + 1800,
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+ .target_residency = 4000,
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+ .flags = CPUIDLE_FLAG_TIME_VALID,
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+ .name = "C4",
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+ .desc = "MPU OFF + CORE ON",
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+ },
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+ {
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+ .enter = omap3_enter_idle_bm,
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+ .exit_latency = 2500 + 7500,
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+ .target_residency = 12000,
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+ .flags = CPUIDLE_FLAG_TIME_VALID,
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+ .name = "C5",
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+ .desc = "MPU RET + CORE RET",
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+ },
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+ {
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+ .enter = omap3_enter_idle_bm,
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+ .exit_latency = 3000 + 8500,
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+ .target_residency = 15000,
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+ .flags = CPUIDLE_FLAG_TIME_VALID,
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+ .name = "C6",
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+ .desc = "MPU OFF + CORE RET",
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+ },
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+ {
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+ .enter = omap3_enter_idle_bm,
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+ .exit_latency = 10000 + 30000,
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+ .target_residency = 30000,
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+ .flags = CPUIDLE_FLAG_TIME_VALID,
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+ .name = "C7",
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+ .desc = "MPU OFF + CORE OFF",
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+ },
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+ },
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+ .state_count = ARRAY_SIZE(omap3_idle_data),
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+ .safe_state_index = 0,
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};
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-/* Helper to fill the C-state common data*/
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-static inline void _fill_cstate(struct cpuidle_driver *drv,
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- int idx, const char *descr)
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-{
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- struct cpuidle_state *state = &drv->states[idx];
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-
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- state->exit_latency = cpuidle_params_table[idx].exit_latency;
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- state->target_residency = cpuidle_params_table[idx].target_residency;
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- state->flags = CPUIDLE_FLAG_TIME_VALID;
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- state->enter = omap3_enter_idle_bm;
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- sprintf(state->name, "C%d", idx + 1);
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- strncpy(state->desc, descr, CPUIDLE_DESC_LEN);
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-
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-}
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-
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-/* Helper to register the driver_data */
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-static inline struct omap3_idle_statedata *_fill_cstate_usage(
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- struct cpuidle_device *dev,
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- int idx)
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-{
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- struct omap3_idle_statedata *cx = &omap3_idle_data[idx];
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- struct cpuidle_state_usage *state_usage = &dev->states_usage[idx];
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-
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- cx->valid = cpuidle_params_table[idx].valid;
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- cpuidle_set_statedata(state_usage, cx);
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-
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- return cx;
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-}
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-
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/**
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* omap3_idle_init - Init routine for OMAP3 idle
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*
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@@ -358,77 +357,20 @@ static inline struct omap3_idle_statedata *_fill_cstate_usage(
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int __init omap3_idle_init(void)
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{
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struct cpuidle_device *dev;
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- struct cpuidle_driver *drv = &omap3_idle_driver;
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- struct omap3_idle_statedata *cx;
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mpu_pd = pwrdm_lookup("mpu_pwrdm");
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core_pd = pwrdm_lookup("core_pwrdm");
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per_pd = pwrdm_lookup("per_pwrdm");
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cam_pd = pwrdm_lookup("cam_pwrdm");
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+ if (!mpu_pd || !core_pd || !per_pd || !cam_pd)
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+ return -ENODEV;
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- drv->safe_state_index = -1;
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- dev = &per_cpu(omap3_idle_dev, smp_processor_id());
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-
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- /* C1 . MPU WFI + Core active */
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- _fill_cstate(drv, 0, "MPU ON + CORE ON");
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- (&drv->states[0])->enter = omap3_enter_idle;
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- drv->safe_state_index = 0;
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- cx = _fill_cstate_usage(dev, 0);
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- cx->valid = 1; /* C1 is always valid */
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- cx->mpu_state = PWRDM_POWER_ON;
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- cx->core_state = PWRDM_POWER_ON;
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-
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- /* C2 . MPU WFI + Core inactive */
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- _fill_cstate(drv, 1, "MPU ON + CORE ON");
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- cx = _fill_cstate_usage(dev, 1);
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- cx->mpu_state = PWRDM_POWER_ON;
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- cx->core_state = PWRDM_POWER_ON;
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-
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- /* C3 . MPU CSWR + Core inactive */
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- _fill_cstate(drv, 2, "MPU RET + CORE ON");
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- cx = _fill_cstate_usage(dev, 2);
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- cx->mpu_state = PWRDM_POWER_RET;
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- cx->core_state = PWRDM_POWER_ON;
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-
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- /* C4 . MPU OFF + Core inactive */
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- _fill_cstate(drv, 3, "MPU OFF + CORE ON");
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- cx = _fill_cstate_usage(dev, 3);
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- cx->mpu_state = PWRDM_POWER_OFF;
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- cx->core_state = PWRDM_POWER_ON;
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-
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- /* C5 . MPU RET + Core RET */
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- _fill_cstate(drv, 4, "MPU RET + CORE RET");
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- cx = _fill_cstate_usage(dev, 4);
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- cx->mpu_state = PWRDM_POWER_RET;
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- cx->core_state = PWRDM_POWER_RET;
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-
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- /* C6 . MPU OFF + Core RET */
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- _fill_cstate(drv, 5, "MPU OFF + CORE RET");
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- cx = _fill_cstate_usage(dev, 5);
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- cx->mpu_state = PWRDM_POWER_OFF;
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- cx->core_state = PWRDM_POWER_RET;
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-
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- /* C7 . MPU OFF + Core OFF */
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- _fill_cstate(drv, 6, "MPU OFF + CORE OFF");
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- cx = _fill_cstate_usage(dev, 6);
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- /*
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- * Erratum i583: implementation for ES rev < Es1.2 on 3630. We cannot
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- * enable OFF mode in a stable form for previous revisions.
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- * We disable C7 state as a result.
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- */
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- if (IS_PM34XX_ERRATUM(PM_SDRC_WAKEUP_ERRATUM_i583)) {
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- cx->valid = 0;
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- pr_warn("%s: core off state C7 disabled due to i583\n",
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- __func__);
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- }
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- cx->mpu_state = PWRDM_POWER_OFF;
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- cx->core_state = PWRDM_POWER_OFF;
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-
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- drv->state_count = OMAP3_NUM_STATES;
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cpuidle_register_driver(&omap3_idle_driver);
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- dev->state_count = OMAP3_NUM_STATES;
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+ dev = &per_cpu(omap3_idle_dev, smp_processor_id());
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+ dev->cpu = 0;
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+
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if (cpuidle_register_device(dev)) {
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printk(KERN_ERR "%s: CPUidle register device failed\n",
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__func__);
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Tony Lindgren