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@@ -180,7 +180,7 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
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return -EINVAL;
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mask = 0xff << shift;
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- bit = 1 << (cpu + shift);
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+ bit = 1 << (cpu_logical_map(cpu) + shift);
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spin_lock(&irq_controller_lock);
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val = readl_relaxed(reg) & ~mask;
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@@ -259,9 +259,15 @@ static void __init gic_dist_init(struct gic_chip_data *gic,
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unsigned int irq_start)
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{
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unsigned int gic_irqs, irq_limit, i;
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+ u32 cpumask;
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void __iomem *base = gic->dist_base;
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- u32 cpumask = 1 << smp_processor_id();
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+ u32 cpu = 0;
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+#ifdef CONFIG_SMP
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+ cpu = cpu_logical_map(smp_processor_id());
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+#endif
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+
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+ cpumask = 1 << cpu;
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cpumask |= cpumask << 8;
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cpumask |= cpumask << 16;
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@@ -382,7 +388,12 @@ void __cpuinit gic_enable_ppi(unsigned int irq)
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#ifdef CONFIG_SMP
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void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
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{
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- unsigned long map = *cpus_addr(*mask);
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+ int cpu;
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+ unsigned long map = 0;
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+
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+ /* Convert our logical CPU mask into a physical one. */
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+ for_each_cpu(cpu, mask)
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+ map |= 1 << cpu_logical_map(cpu);
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/*
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* Ensure that stores to Normal memory are visible to the
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