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@@ -40,7 +40,7 @@ MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
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/* TODO: copied from ehci-hcd.c - can this be refactored? */
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/*
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- * handshake - spin reading hc until handshake completes or fails
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+ * xhci_handshake - spin reading hc until handshake completes or fails
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* @ptr: address of hc register to be read
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* @mask: bits to look at in result of read
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* @done: value of those bits when handshake succeeds
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@@ -52,7 +52,7 @@ MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
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* handshake done). There are two failure modes: "usec" have passed (major
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* hardware flakeout), or the register reads as all-ones (hardware removed).
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*/
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-int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
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+int xhci_handshake(struct xhci_hcd *xhci, void __iomem *ptr,
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u32 mask, u32 done, int usec)
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{
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u32 result;
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@@ -103,7 +103,7 @@ int xhci_halt(struct xhci_hcd *xhci)
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xhci_dbg(xhci, "// Halt the HC\n");
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xhci_quiesce(xhci);
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- ret = handshake(xhci, &xhci->op_regs->status,
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+ ret = xhci_handshake(xhci, &xhci->op_regs->status,
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STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
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if (!ret) {
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xhci->xhc_state |= XHCI_STATE_HALTED;
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@@ -132,7 +132,7 @@ static int xhci_start(struct xhci_hcd *xhci)
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* Wait for the HCHalted Status bit to be 0 to indicate the host is
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* running.
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*/
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- ret = handshake(xhci, &xhci->op_regs->status,
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+ ret = xhci_handshake(xhci, &xhci->op_regs->status,
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STS_HALT, 0, XHCI_MAX_HALT_USEC);
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if (ret == -ETIMEDOUT)
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xhci_err(xhci, "Host took too long to start, "
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@@ -167,7 +167,7 @@ int xhci_reset(struct xhci_hcd *xhci)
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command |= CMD_RESET;
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xhci_writel(xhci, command, &xhci->op_regs->command);
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- ret = handshake(xhci, &xhci->op_regs->command,
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+ ret = xhci_handshake(xhci, &xhci->op_regs->command,
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CMD_RESET, 0, 10 * 1000 * 1000);
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if (ret)
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return ret;
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@@ -177,7 +177,7 @@ int xhci_reset(struct xhci_hcd *xhci)
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* xHCI cannot write to any doorbells or operational registers other
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* than status until the "Controller Not Ready" flag is cleared.
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*/
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- ret = handshake(xhci, &xhci->op_regs->status,
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+ ret = xhci_handshake(xhci, &xhci->op_regs->status,
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STS_CNR, 0, 10 * 1000 * 1000);
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for (i = 0; i < 2; ++i) {
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@@ -890,7 +890,7 @@ int xhci_suspend(struct xhci_hcd *xhci)
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command = xhci_readl(xhci, &xhci->op_regs->command);
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command &= ~CMD_RUN;
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xhci_writel(xhci, command, &xhci->op_regs->command);
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- if (handshake(xhci, &xhci->op_regs->status,
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+ if (xhci_handshake(xhci, &xhci->op_regs->status,
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STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC)) {
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xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
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spin_unlock_irq(&xhci->lock);
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@@ -905,7 +905,8 @@ int xhci_suspend(struct xhci_hcd *xhci)
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command = xhci_readl(xhci, &xhci->op_regs->command);
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command |= CMD_CSS;
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xhci_writel(xhci, command, &xhci->op_regs->command);
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- if (handshake(xhci, &xhci->op_regs->status, STS_SAVE, 0, 10 * 1000)) {
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+ if (xhci_handshake(xhci, &xhci->op_regs->status,
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+ STS_SAVE, 0, 10 * 1000)) {
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xhci_warn(xhci, "WARN: xHC save state timeout\n");
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spin_unlock_irq(&xhci->lock);
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return -ETIMEDOUT;
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@@ -967,7 +968,7 @@ int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
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command = xhci_readl(xhci, &xhci->op_regs->command);
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command |= CMD_CRS;
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xhci_writel(xhci, command, &xhci->op_regs->command);
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- if (handshake(xhci, &xhci->op_regs->status,
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+ if (xhci_handshake(xhci, &xhci->op_regs->status,
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STS_RESTORE, 0, 10 * 1000)) {
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xhci_warn(xhci, "WARN: xHC restore state timeout\n");
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spin_unlock_irq(&xhci->lock);
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@@ -1035,7 +1036,7 @@ int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
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command = xhci_readl(xhci, &xhci->op_regs->command);
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command |= CMD_RUN;
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xhci_writel(xhci, command, &xhci->op_regs->command);
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- handshake(xhci, &xhci->op_regs->status, STS_HALT,
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+ xhci_handshake(xhci, &xhci->op_regs->status, STS_HALT,
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0, 250 * 1000);
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/* step 5: walk topology and initialize portsc,
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@@ -3874,7 +3875,8 @@ static int xhci_usb2_software_lpm_test(struct usb_hcd *hcd,
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spin_lock_irqsave(&xhci->lock, flags);
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/* Check L1 Status */
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- ret = handshake(xhci, pm_addr, PORT_L1S_MASK, PORT_L1S_SUCCESS, 125);
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+ ret = xhci_handshake(xhci, pm_addr,
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+ PORT_L1S_MASK, PORT_L1S_SUCCESS, 125);
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if (ret != -ETIMEDOUT) {
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/* enter L1 successfully */
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temp = xhci_readl(xhci, addr);
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